Algorithms for VLSI physical design automation:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston [u.a.]
Kluwer
1999
|
| Ausgabe: | 3. ed. |
| Schlagworte: | |
| Beschreibung: | XXX, 572 S. Ill., graph. Darst. |
| ISBN: | 0792383931 |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV012491143 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | t | ||
| 008 | 990408s1999 ad|| |||| 00||| eng d | ||
| 020 | |a 0792383931 |9 0-7923-8393-1 | ||
| 035 | |a (OCoLC)246270251 | ||
| 035 | |a (DE-599)BVBBV012491143 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-20 |a DE-92 |a DE-29T |a DE-188 | ||
| 050 | 0 | |a TK7874 | |
| 082 | 0 | |a 621.39/5 |2 21 | |
| 084 | |a ZN 4110 |0 (DE-625)157352: |2 rvk | ||
| 084 | |a ZN 4950 |0 (DE-625)157424: |2 rvk | ||
| 084 | |a ZN 4952 |0 (DE-625)157425: |2 rvk | ||
| 100 | 1 | |a Sherwani, Naveed A. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Algorithms for VLSI physical design automation |c Naveed A. Sherwani |
| 250 | |a 3. ed. | ||
| 264 | 1 | |a Boston [u.a.] |b Kluwer |c 1999 | |
| 300 | |a XXX, 572 S. |b Ill., graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 7 | |a Algorithmes |2 ram | |
| 650 | 7 | |a Circuits intégrés à très grande échelle - Conception et construction |2 ram | |
| 650 | 7 | |a Conception assistée par ordinateur |2 ram | |
| 650 | 4 | |a Algorithms | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Computer-aided design | |
| 650 | 0 | 7 | |a Entwurf |0 (DE-588)4121208-3 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Algorithmus |0 (DE-588)4001183-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 0 | 1 | |a Entwurf |0 (DE-588)4121208-3 |D s |
| 689 | 0 | |5 DE-604 | |
| 689 | 1 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 1 | 1 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |D s |
| 689 | 1 | |5 DE-604 | |
| 689 | 2 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 2 | 1 | |a Algorithmus |0 (DE-588)4001183-5 |D s |
| 689 | 2 | |5 DE-604 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-008479200 | ||
Datensatz im Suchindex
| _version_ | 1804127134884560896 |
|---|---|
| any_adam_object | |
| author | Sherwani, Naveed A. |
| author_facet | Sherwani, Naveed A. |
| author_role | aut |
| author_sort | Sherwani, Naveed A. |
| author_variant | n a s na nas |
| building | Verbundindex |
| bvnumber | BV012491143 |
| callnumber-first | T - Technology |
| callnumber-label | TK7874 |
| callnumber-raw | TK7874 |
| callnumber-search | TK7874 |
| callnumber-sort | TK 47874 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ZN 4110 ZN 4950 ZN 4952 |
| ctrlnum | (OCoLC)246270251 (DE-599)BVBBV012491143 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | 3. ed. |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01859nam a2200541 c 4500</leader><controlfield tag="001">BV012491143</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">990408s1999 ad|| |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0792383931</subfield><subfield code="9">0-7923-8393-1</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)246270251</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV012491143</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-20</subfield><subfield code="a">DE-92</subfield><subfield code="a">DE-29T</subfield><subfield code="a">DE-188</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7874</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.39/5</subfield><subfield code="2">21</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4110</subfield><subfield code="0">(DE-625)157352:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4950</subfield><subfield code="0">(DE-625)157424:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4952</subfield><subfield code="0">(DE-625)157425:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Sherwani, Naveed A.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Algorithms for VLSI physical design automation</subfield><subfield code="c">Naveed A. Sherwani</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">3. ed.</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston [u.a.]</subfield><subfield code="b">Kluwer</subfield><subfield code="c">1999</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XXX, 572 S.</subfield><subfield code="b">Ill., graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Algorithmes</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Circuits intégrés à très grande échelle - Conception et construction</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Conception assistée par ordinateur</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Algorithms</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Very large scale integration</subfield><subfield code="x">Computer-aided design</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Algorithmus</subfield><subfield code="0">(DE-588)4001183-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="1"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="2" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="2" ind2="1"><subfield code="a">Algorithmus</subfield><subfield code="0">(DE-588)4001183-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="2" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-008479200</subfield></datafield></record></collection> |
| id | DE-604.BV012491143 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T18:28:32Z |
| institution | BVB |
| isbn | 0792383931 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-008479200 |
| oclc_num | 246270251 |
| open_access_boolean | |
| owner | DE-20 DE-92 DE-29T DE-188 |
| owner_facet | DE-20 DE-92 DE-29T DE-188 |
| physical | XXX, 572 S. Ill., graph. Darst. |
| publishDate | 1999 |
| publishDateSearch | 1999 |
| publishDateSort | 1999 |
| publisher | Kluwer |
| record_format | marc |
| spelling | Sherwani, Naveed A. Verfasser aut Algorithms for VLSI physical design automation Naveed A. Sherwani 3. ed. Boston [u.a.] Kluwer 1999 XXX, 572 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Algorithmes ram Circuits intégrés à très grande échelle - Conception et construction ram Conception assistée par ordinateur ram Algorithms Integrated circuits Very large scale integration Computer-aided design Entwurf (DE-588)4121208-3 gnd rswk-swf Algorithmus (DE-588)4001183-5 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf VLSI (DE-588)4117388-0 s Entwurf (DE-588)4121208-3 s DE-604 Schaltungsentwurf (DE-588)4179389-4 s Algorithmus (DE-588)4001183-5 s |
| spellingShingle | Sherwani, Naveed A. Algorithms for VLSI physical design automation Algorithmes ram Circuits intégrés à très grande échelle - Conception et construction ram Conception assistée par ordinateur ram Algorithms Integrated circuits Very large scale integration Computer-aided design Entwurf (DE-588)4121208-3 gnd Algorithmus (DE-588)4001183-5 gnd VLSI (DE-588)4117388-0 gnd Schaltungsentwurf (DE-588)4179389-4 gnd |
| subject_GND | (DE-588)4121208-3 (DE-588)4001183-5 (DE-588)4117388-0 (DE-588)4179389-4 |
| title | Algorithms for VLSI physical design automation |
| title_auth | Algorithms for VLSI physical design automation |
| title_exact_search | Algorithms for VLSI physical design automation |
| title_full | Algorithms for VLSI physical design automation Naveed A. Sherwani |
| title_fullStr | Algorithms for VLSI physical design automation Naveed A. Sherwani |
| title_full_unstemmed | Algorithms for VLSI physical design automation Naveed A. Sherwani |
| title_short | Algorithms for VLSI physical design automation |
| title_sort | algorithms for vlsi physical design automation |
| topic | Algorithmes ram Circuits intégrés à très grande échelle - Conception et construction ram Conception assistée par ordinateur ram Algorithms Integrated circuits Very large scale integration Computer-aided design Entwurf (DE-588)4121208-3 gnd Algorithmus (DE-588)4001183-5 gnd VLSI (DE-588)4117388-0 gnd Schaltungsentwurf (DE-588)4179389-4 gnd |
| topic_facet | Algorithmes Circuits intégrés à très grande échelle - Conception et construction Conception assistée par ordinateur Algorithms Integrated circuits Very large scale integration Computer-aided design Entwurf Algorithmus VLSI Schaltungsentwurf |
| work_keys_str_mv | AT sherwaninaveeda algorithmsforvlsiphysicaldesignautomation |