FPGA '99: ACM SIGDA International Symposium on Field Programmable Gate Arrays ; [Monterey, California, February 21 - 23, 1999]
Gespeichert in:
| Körperschaft: | |
|---|---|
| Format: | Tagungsbericht Buch |
| Sprache: | English |
| Veröffentlicht: |
New York, NY
Assoc. for Computing Machinery
1999
|
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | VII, 257 S. Ill., graph. Darst. |
| ISBN: | 1581130880 |
Internformat
MARC
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Datensatz im Suchindex
| _version_ | 1820868381415309312 |
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| adam_text |
Table
of
Contents
Session
1.
Commercial FPGA Architectures
Chair: Jonathan
Rose, University of
Toronto
1.1
A
new high density and very low cost reprogrammable FPGA architecture, Sinan
Kaptanoglu, Greg
Bakker,
Aran
Kundu, Ivan Corneillet, Actel Corporation; Ben Ting,
BTRInc
.3
1.2
Hybrid Product Term and
LUT
Based Architectures Using Embedded Memory
Blocks, Frank
Heile,
Andrew Leaver,
Altera
Corporation
.13
1.3
An Innovative, Segmented High Performance FPGA Family with Variable-Grain-
Architecture and Wide gating functions, Om Agrawal, Herman Chang, Brad Sharpe-
Geisler, Nick
Schmitz,
Bai
Nguyen, Jack Wong, Giap
Tran,
Fabiano Fontana, Bill
Harding, Vantis Corporation
.17
Session
2.
Mapping, Packing and Floorplanning
Chair: Margaret Marek-Sadowska, University of California, Santa Barbara
2.1
Cut Ranking and Pruning: Enabling a General and Efficient FPGA Mapping
Solution, Jason Cong, Chang Wu, University of California, Los Angeles, Yuzheng
Ding, Lucent Technologies
.29
2.2
Using Cluster-Based Logic Blocks and Timing-Driven Packing to Improve FPGA
Speed and Density, Alexander Marquardt, Vaughn Betz, Jonathan Rose, University of
Toronto
.37
2.3
A Methodology for Fast FPGA Floorplanning, John
Emmert,
Dinesh
B hatia,
University of Cincinatti
.47
Session
3.
FPGA Architecture Studies
Chair: Tim Southgate,
Altera
3.1
FPGA Routing Architecture: Segmentation and Buffering to Optimize Speed and
Density, Vaughn Betz, Jonathan Rose, University of Toronto
.59
3.2
Balancing Interconnect and Computation in
a Reconfigurable
Computing Array
(or, why you don't really want
100%
LUT
utilization), Andre' DeHon, University of
California, Berkeley
.69
Session
4.
Rapid Reconfiguration
Chair: Mike Butts, Synopsys
4.1
Configuration Cloning: Exploiting Regularity in Dynamic DSP Architectures, S.R.
Park, W. Burleson, University of Massachusetts
.81
4.2
Don't Care Discovery for FPGA Configuration Compression, Zhiyuan Li, Scott
Hauck, Northwestern University
.91
Session 5.
Computational
Applications
Chair: Brad Hutchings, Brigham Young University
5.1
A FPGA-Based Hardware Implementation of Generalized Profile Search Using
Online Arithmetic, Emeka Mosanya,
Eduardo
Sanchez, Swiss Federal Institute of
Technology
.101
5.2
Procedural Texture Mapping on FPGAs, Andy G. Ye, David M. Lewis, University
of Toronto
.112
Panel: FPGAs in the Era of Systems-on-a-Chip
Moderator: Scott Hauck, Northwestern University
.121
Session
6.
FPGAs for Custom Computing
Chair: Carl Ebeling, University of Washington
6.1
HSRA: High-Speed, Hierarchical Synchronous
Reconfigurable
Array, William
Tsu, Kip
Масу,
Atui
Joshi, Randy Huang, Norman Walker, Tony Tung, Omid
Rowhani,
Varghese
George, John Wawrzynek, Andre' DeHon, University of
California, Berkeley
.125
6.2
A Reconfigurable
Arithmetic Array for Multimedia Applications, Alan Marshall,
Hewlett Packard;
Jean Vuillemin, Ecole Normale
Superieure;
Tony Stansfield, Igor
Kostarnov, Hewlett Packard;
Brad
Hutchings, Brigham
Young University.
135
6.3 Memory
Interfacing and Instruction Specification for
Reconfigurable
Processors,
Jeffrey A Jacob, Paul Chow, University of Toronto
.145
Session
7.
Placement and Routing
Chair:
Martine
Schlag,
University of California, Santa Cruz
7.1
Trading Quality for Compile Time: Ultra-Fast Placement for FPGAs, Yaska
Sankar, Jonathan Rose, University of Toronto
.
7.2
Satisfiability-Based Layout Revisited: Detailed Routing of Complex FPGAs Via
Search-Based Boolean SAT, Gi-Joon
Nam, Karem
A. Sakallah, University of
Michigan; Rob A.
Rutenbar,
Carnegie Mellon University
.
7.3
Multi-Terminal Net Routing for Partial Crossbar-Based Multi-FPGA Systems,
Abdel
Ejnioui; University of South Florida;
N.
Ranganathan, University of Texas
.176
Session
8.
DPGAs and Pipeline Configurable FPGAs
Chair: David Lewis, University of Toronto
8.1
Circuit Partitioning for Dynamically
Reconfigurable
FPGAs, Huiqun Liu, D.F.
Wong, University of Texas
.187
8.2
Fast Compilation for Pipelined
Reconfigurable
Fabrics, Mihai Budiu, Seth
Copen
Goldstein, Carnegie Mellon University
.195
8.3
Configuration Caching Vs Data Caching for Striped FPGAs, Deepali Deshpande,
Arun
К
Somam,
Akhilesh Tyagi, Iowa State University
.206
Session 9. Applications
Chair:
Ray Andraka,
And raka
Consulting Group
9.1
String Matching on Multicontext FPGAs using Self-Reconfiguration, Reetinder
P.S.
Sidhu,
Alessandro Mei,
Viktor
К.
Prasanna, University of Southern California
.217
9.2
Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths for
FPGAs, P. Kollig, B.M. Al-Hashimi, Staffordshire University
.227
9.3
Exploiting FPGA-Features during the Emulation of a Fast Reactive Embedded
System,
Karlheinz
Weiss,
Thorsten Steckstor,
Gernot Koch, Wolfgang
Rosenstiel,
University of Tubingen
.235
Poster Paper Abstracts
.243
Author Index
.257 |
| any_adam_object | 1 |
| author_corporate | FPGA Monterey, Calif |
| author_corporate_role | aut |
| author_facet | FPGA Monterey, Calif |
| author_sort | FPGA Monterey, Calif |
| building | Verbundindex |
| bvnumber | BV012414790 |
| classification_rvk | SS 1999 |
| classification_tum | DAT 195f |
| ctrlnum | (OCoLC)314162181 (DE-599)BVBBV012414790 |
| discipline | Informatik |
| format | Conference Proceeding Book |
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| genre_facet | Konferenzschrift 1999 Monterey Calif. |
| id | DE-604.BV012414790 |
| illustrated | Illustrated |
| indexdate | 2025-01-10T13:23:28Z |
| institution | BVB |
| institution_GND | (DE-588)5331363-X (DE-588)10620-3 |
| isbn | 1581130880 |
| language | English |
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| physical | VII, 257 S. Ill., graph. Darst. |
| publishDate | 1999 |
| publishDateSearch | 1999 |
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| publisher | Assoc. for Computing Machinery |
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| spelling | FPGA 7 1999 Monterey, Calif. Verfasser (DE-588)5331363-X aut FPGA '99 ACM SIGDA International Symposium on Field Programmable Gate Arrays ; [Monterey, California, February 21 - 23, 1999] New York, NY Assoc. for Computing Machinery 1999 VII, 257 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Gate-Array-Bauelement (DE-588)4113666-4 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 1999 Monterey Calif. gnd-content Gate-Array-Bauelement (DE-588)4113666-4 s DE-604 Association for Computing Machinery Special Interest Group on Design Automation Sonstige (DE-588)10620-3 oth Digitalisierung TU Muenchen application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=008422967&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | FPGA '99 ACM SIGDA International Symposium on Field Programmable Gate Arrays ; [Monterey, California, February 21 - 23, 1999] Gate-Array-Bauelement (DE-588)4113666-4 gnd |
| subject_GND | (DE-588)4113666-4 (DE-588)1071861417 |
| title | FPGA '99 ACM SIGDA International Symposium on Field Programmable Gate Arrays ; [Monterey, California, February 21 - 23, 1999] |
| title_auth | FPGA '99 ACM SIGDA International Symposium on Field Programmable Gate Arrays ; [Monterey, California, February 21 - 23, 1999] |
| title_exact_search | FPGA '99 ACM SIGDA International Symposium on Field Programmable Gate Arrays ; [Monterey, California, February 21 - 23, 1999] |
| title_full | FPGA '99 ACM SIGDA International Symposium on Field Programmable Gate Arrays ; [Monterey, California, February 21 - 23, 1999] |
| title_fullStr | FPGA '99 ACM SIGDA International Symposium on Field Programmable Gate Arrays ; [Monterey, California, February 21 - 23, 1999] |
| title_full_unstemmed | FPGA '99 ACM SIGDA International Symposium on Field Programmable Gate Arrays ; [Monterey, California, February 21 - 23, 1999] |
| title_short | FPGA '99 |
| title_sort | fpga 99 acm sigda international symposium on field programmable gate arrays monterey california february 21 23 1999 |
| title_sub | ACM SIGDA International Symposium on Field Programmable Gate Arrays ; [Monterey, California, February 21 - 23, 1999] |
| topic | Gate-Array-Bauelement (DE-588)4113666-4 gnd |
| topic_facet | Gate-Array-Bauelement Konferenzschrift 1999 Monterey Calif. |
| url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=008422967&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
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