A VHDL synthesis primer:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Allentown, PA
Star Galaxy Publ.
1996
|
| Schlagworte: | |
| Beschreibung: | XVI, 238 S. graph. Darst. |
| ISBN: | 0965039102 |
Internformat
MARC
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| 100 | 1 | |a Bhasker, Jayaram |e Verfasser |0 (DE-588)114540160 |4 aut | |
| 245 | 1 | 0 | |a A VHDL synthesis primer |c J. Bhasker |
| 264 | 1 | |a Allentown, PA |b Star Galaxy Publ. |c 1996 | |
| 300 | |a XVI, 238 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 4 | |a Datenverarbeitung | |
| 650 | 4 | |a Computer-aided design | |
| 650 | 4 | |a System design |x Data processing | |
| 650 | 4 | |a VHDL (Computer hardware description language) | |
| 650 | 0 | 7 | |a VHDL |0 (DE-588)4254792-1 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VHDL |0 (DE-588)4254792-1 |D s |
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Datensatz im Suchindex
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|---|---|
| any_adam_object | |
| author | Bhasker, Jayaram |
| author_GND | (DE-588)114540160 |
| author_facet | Bhasker, Jayaram |
| author_role | aut |
| author_sort | Bhasker, Jayaram |
| author_variant | j b jb |
| building | Verbundindex |
| bvnumber | BV011716715 |
| callnumber-first | T - Technology |
| callnumber-label | TK7885 |
| callnumber-raw | TK7885.7 |
| callnumber-search | TK7885.7 |
| callnumber-sort | TK 47885.7 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 250 |
| ctrlnum | (OCoLC)35121579 (DE-599)BVBBV011716715 |
| dewey-full | 621.39/2 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/2 |
| dewey-search | 621.39/2 |
| dewey-sort | 3621.39 12 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV011716715 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T18:14:32Z |
| institution | BVB |
| isbn | 0965039102 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007901228 |
| oclc_num | 35121579 |
| open_access_boolean | |
| owner | DE-Aug4 |
| owner_facet | DE-Aug4 |
| physical | XVI, 238 S. graph. Darst. |
| publishDate | 1996 |
| publishDateSearch | 1996 |
| publishDateSort | 1996 |
| publisher | Star Galaxy Publ. |
| record_format | marc |
| spelling | Bhasker, Jayaram Verfasser (DE-588)114540160 aut A VHDL synthesis primer J. Bhasker Allentown, PA Star Galaxy Publ. 1996 XVI, 238 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Datenverarbeitung Computer-aided design System design Data processing VHDL (Computer hardware description language) VHDL (DE-588)4254792-1 gnd rswk-swf VHDL (DE-588)4254792-1 s DE-604 |
| spellingShingle | Bhasker, Jayaram A VHDL synthesis primer Datenverarbeitung Computer-aided design System design Data processing VHDL (Computer hardware description language) VHDL (DE-588)4254792-1 gnd |
| subject_GND | (DE-588)4254792-1 |
| title | A VHDL synthesis primer |
| title_auth | A VHDL synthesis primer |
| title_exact_search | A VHDL synthesis primer |
| title_full | A VHDL synthesis primer J. Bhasker |
| title_fullStr | A VHDL synthesis primer J. Bhasker |
| title_full_unstemmed | A VHDL synthesis primer J. Bhasker |
| title_short | A VHDL synthesis primer |
| title_sort | a vhdl synthesis primer |
| topic | Datenverarbeitung Computer-aided design System design Data processing VHDL (Computer hardware description language) VHDL (DE-588)4254792-1 gnd |
| topic_facet | Datenverarbeitung Computer-aided design System design Data processing VHDL (Computer hardware description language) VHDL |
| work_keys_str_mv | AT bhaskerjayaram avhdlsynthesisprimer |