VHDL: a logic synthesis approach
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
London [u.a.]
Chapman & Hall
1997
|
| Schlagworte: | |
| Beschreibung: | X, 339 S. grraph. Darst. |
| ISBN: | 0412616505 |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV011688870 | ||
| 003 | DE-604 | ||
| 005 | 20070725 | ||
| 007 | t | ||
| 008 | 971217s1997 |||| |||| 00||| engod | ||
| 020 | |a 0412616505 |9 0-412-61650-5 | ||
| 035 | |a (OCoLC)37413688 | ||
| 035 | |a (DE-599)BVBBV011688870 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-91G | ||
| 050 | 0 | |a TK7885.7 | |
| 082 | 0 | |a 621.39/2 |2 21 | |
| 084 | |a DAT 370f |2 stub | ||
| 100 | 1 | |a Naylor, David |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a VHDL |b a logic synthesis approach |c David Naylor and Simon Jones |
| 264 | 1 | |a London [u.a.] |b Chapman & Hall |c 1997 | |
| 300 | |a X, 339 S. |b grraph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 4 | |a Datenverarbeitung | |
| 650 | 4 | |a Computer-aided design | |
| 650 | 4 | |a Logic design |x Data processing | |
| 650 | 4 | |a VHDL (Computer hardware description language) | |
| 700 | 1 | |a Jones, Simon |e Verfasser |4 aut | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-007881272 | ||
Datensatz im Suchindex
| _version_ | 1804126225718837248 |
|---|---|
| any_adam_object | |
| author | Naylor, David Jones, Simon |
| author_facet | Naylor, David Jones, Simon |
| author_role | aut aut |
| author_sort | Naylor, David |
| author_variant | d n dn s j sj |
| building | Verbundindex |
| bvnumber | BV011688870 |
| callnumber-first | T - Technology |
| callnumber-label | TK7885 |
| callnumber-raw | TK7885.7 |
| callnumber-search | TK7885.7 |
| callnumber-sort | TK 47885.7 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_tum | DAT 370f |
| ctrlnum | (OCoLC)37413688 (DE-599)BVBBV011688870 |
| dewey-full | 621.39/2 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/2 |
| dewey-search | 621.39/2 |
| dewey-sort | 3621.39 12 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01030nam a2200349 c 4500</leader><controlfield tag="001">BV011688870</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20070725 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">971217s1997 |||| |||| 00||| engod</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0412616505</subfield><subfield code="9">0-412-61650-5</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)37413688</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV011688870</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91G</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7885.7</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.39/2</subfield><subfield code="2">21</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">DAT 370f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Naylor, David</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">VHDL</subfield><subfield code="b">a logic synthesis approach</subfield><subfield code="c">David Naylor and Simon Jones</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">London [u.a.]</subfield><subfield code="b">Chapman & Hall</subfield><subfield code="c">1997</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">X, 339 S.</subfield><subfield code="b">grraph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Datenverarbeitung</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-aided design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic design</subfield><subfield code="x">Data processing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">VHDL (Computer hardware description language)</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Jones, Simon</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-007881272</subfield></datafield></record></collection> |
| id | DE-604.BV011688870 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T18:14:04Z |
| institution | BVB |
| isbn | 0412616505 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007881272 |
| oclc_num | 37413688 |
| open_access_boolean | |
| owner | DE-91G DE-BY-TUM |
| owner_facet | DE-91G DE-BY-TUM |
| physical | X, 339 S. grraph. Darst. |
| publishDate | 1997 |
| publishDateSearch | 1997 |
| publishDateSort | 1997 |
| publisher | Chapman & Hall |
| record_format | marc |
| spelling | Naylor, David Verfasser aut VHDL a logic synthesis approach David Naylor and Simon Jones London [u.a.] Chapman & Hall 1997 X, 339 S. grraph. Darst. txt rdacontent n rdamedia nc rdacarrier Datenverarbeitung Computer-aided design Logic design Data processing VHDL (Computer hardware description language) Jones, Simon Verfasser aut |
| spellingShingle | Naylor, David Jones, Simon VHDL a logic synthesis approach Datenverarbeitung Computer-aided design Logic design Data processing VHDL (Computer hardware description language) |
| title | VHDL a logic synthesis approach |
| title_auth | VHDL a logic synthesis approach |
| title_exact_search | VHDL a logic synthesis approach |
| title_full | VHDL a logic synthesis approach David Naylor and Simon Jones |
| title_fullStr | VHDL a logic synthesis approach David Naylor and Simon Jones |
| title_full_unstemmed | VHDL a logic synthesis approach David Naylor and Simon Jones |
| title_short | VHDL |
| title_sort | vhdl a logic synthesis approach |
| title_sub | a logic synthesis approach |
| topic | Datenverarbeitung Computer-aided design Logic design Data processing VHDL (Computer hardware description language) |
| topic_facet | Datenverarbeitung Computer-aided design Logic design Data processing VHDL (Computer hardware description language) |
| work_keys_str_mv | AT naylordavid vhdlalogicsynthesisapproach AT jonessimon vhdlalogicsynthesisapproach |