Algorithms for synthesis and testing of asynchronous circuits:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston [u.a.]
Kluwer
1996
|
| Ausgabe: | 2. print. |
| Schriftenreihe: | The Kluwer international series in engineering and computer science
232 : VLSI, computer architecture and digital signal processing |
| Schlagworte: | |
| Beschreibung: | XVIII, 339 S. graph. Darst. |
| ISBN: | 0792393643 |
Internformat
MARC
| LEADER | 00000nam a2200000 cb4500 | ||
|---|---|---|---|
| 001 | BV011378994 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | t | ||
| 008 | 970610s1996 d||| |||| 00||| eng d | ||
| 020 | |a 0792393643 |9 0-7923-9364-3 | ||
| 035 | |a (OCoLC)246258141 | ||
| 035 | |a (DE-599)BVBBV011378994 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-20 |a DE-29T | ||
| 082 | 0 | |a 621.39/5 | |
| 084 | |a ST 190 |0 (DE-625)143607: |2 rvk | ||
| 100 | 1 | |a Lavagno, Luciano |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Algorithms for synthesis and testing of asynchronous circuits |c Luciano Lavagno ; Alberto Sangiovanni-Vincentelli |
| 250 | |a 2. print. | ||
| 264 | 1 | |a Boston [u.a.] |b Kluwer |c 1996 | |
| 300 | |a XVIII, 339 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 1 | |a The Kluwer international series in engineering and computer science |v 232 : VLSI, computer architecture and digital signal processing | |
| 650 | 4 | |a Mathematisches Modell | |
| 650 | 4 | |a Electronic digital computers |x Circuits |x Mathematical models | |
| 650 | 4 | |a Electronic digital computers |x Circuits |x Testing | |
| 650 | 4 | |a Integrated circuits |x Design | |
| 650 | 0 | 7 | |a Asynchrones Schaltwerk |0 (DE-588)4271581-7 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Asynchrones Schaltwerk |0 (DE-588)4271581-7 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Sangiovanni-Vincentelli, Alberto |e Verfasser |4 aut | |
| 830 | 0 | |a The Kluwer international series in engineering and computer science |v 232 : VLSI, computer architecture and digital signal processing |w (DE-604)BV023545171 |9 232 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-007646982 | ||
Datensatz im Suchindex
| _version_ | 1804125889312587776 |
|---|---|
| any_adam_object | |
| author | Lavagno, Luciano Sangiovanni-Vincentelli, Alberto |
| author_facet | Lavagno, Luciano Sangiovanni-Vincentelli, Alberto |
| author_role | aut aut |
| author_sort | Lavagno, Luciano |
| author_variant | l l ll a s v asv |
| building | Verbundindex |
| bvnumber | BV011378994 |
| classification_rvk | ST 190 |
| ctrlnum | (OCoLC)246258141 (DE-599)BVBBV011378994 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | 2. print. |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01648nam a2200409 cb4500</leader><controlfield tag="001">BV011378994</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">970610s1996 d||| |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0792393643</subfield><subfield code="9">0-7923-9364-3</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)246258141</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV011378994</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-20</subfield><subfield code="a">DE-29T</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.39/5</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 190</subfield><subfield code="0">(DE-625)143607:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Lavagno, Luciano</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Algorithms for synthesis and testing of asynchronous circuits</subfield><subfield code="c">Luciano Lavagno ; Alberto Sangiovanni-Vincentelli</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">2. print.</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston [u.a.]</subfield><subfield code="b">Kluwer</subfield><subfield code="c">1996</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XVIII, 339 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">The Kluwer international series in engineering and computer science</subfield><subfield code="v">232 : VLSI, computer architecture and digital signal processing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Mathematisches Modell</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic digital computers</subfield><subfield code="x">Circuits</subfield><subfield code="x">Mathematical models</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic digital computers</subfield><subfield code="x">Circuits</subfield><subfield code="x">Testing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Design</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Asynchrones Schaltwerk</subfield><subfield code="0">(DE-588)4271581-7</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Asynchrones Schaltwerk</subfield><subfield code="0">(DE-588)4271581-7</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Sangiovanni-Vincentelli, Alberto</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">The Kluwer international series in engineering and computer science</subfield><subfield code="v">232 : VLSI, computer architecture and digital signal processing</subfield><subfield code="w">(DE-604)BV023545171</subfield><subfield code="9">232</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-007646982</subfield></datafield></record></collection> |
| id | DE-604.BV011378994 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T18:08:44Z |
| institution | BVB |
| isbn | 0792393643 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007646982 |
| oclc_num | 246258141 |
| open_access_boolean | |
| owner | DE-20 DE-29T |
| owner_facet | DE-20 DE-29T |
| physical | XVIII, 339 S. graph. Darst. |
| publishDate | 1996 |
| publishDateSearch | 1996 |
| publishDateSort | 1996 |
| publisher | Kluwer |
| record_format | marc |
| series | The Kluwer international series in engineering and computer science |
| series2 | The Kluwer international series in engineering and computer science |
| spelling | Lavagno, Luciano Verfasser aut Algorithms for synthesis and testing of asynchronous circuits Luciano Lavagno ; Alberto Sangiovanni-Vincentelli 2. print. Boston [u.a.] Kluwer 1996 XVIII, 339 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier The Kluwer international series in engineering and computer science 232 : VLSI, computer architecture and digital signal processing Mathematisches Modell Electronic digital computers Circuits Mathematical models Electronic digital computers Circuits Testing Integrated circuits Design Asynchrones Schaltwerk (DE-588)4271581-7 gnd rswk-swf Asynchrones Schaltwerk (DE-588)4271581-7 s DE-604 Sangiovanni-Vincentelli, Alberto Verfasser aut The Kluwer international series in engineering and computer science 232 : VLSI, computer architecture and digital signal processing (DE-604)BV023545171 232 |
| spellingShingle | Lavagno, Luciano Sangiovanni-Vincentelli, Alberto Algorithms for synthesis and testing of asynchronous circuits The Kluwer international series in engineering and computer science Mathematisches Modell Electronic digital computers Circuits Mathematical models Electronic digital computers Circuits Testing Integrated circuits Design Asynchrones Schaltwerk (DE-588)4271581-7 gnd |
| subject_GND | (DE-588)4271581-7 |
| title | Algorithms for synthesis and testing of asynchronous circuits |
| title_auth | Algorithms for synthesis and testing of asynchronous circuits |
| title_exact_search | Algorithms for synthesis and testing of asynchronous circuits |
| title_full | Algorithms for synthesis and testing of asynchronous circuits Luciano Lavagno ; Alberto Sangiovanni-Vincentelli |
| title_fullStr | Algorithms for synthesis and testing of asynchronous circuits Luciano Lavagno ; Alberto Sangiovanni-Vincentelli |
| title_full_unstemmed | Algorithms for synthesis and testing of asynchronous circuits Luciano Lavagno ; Alberto Sangiovanni-Vincentelli |
| title_short | Algorithms for synthesis and testing of asynchronous circuits |
| title_sort | algorithms for synthesis and testing of asynchronous circuits |
| topic | Mathematisches Modell Electronic digital computers Circuits Mathematical models Electronic digital computers Circuits Testing Integrated circuits Design Asynchrones Schaltwerk (DE-588)4271581-7 gnd |
| topic_facet | Mathematisches Modell Electronic digital computers Circuits Mathematical models Electronic digital computers Circuits Testing Integrated circuits Design Asynchrones Schaltwerk |
| volume_link | (DE-604)BV023545171 |
| work_keys_str_mv | AT lavagnoluciano algorithmsforsynthesisandtestingofasynchronouscircuits AT sangiovannivincentellialberto algorithmsforsynthesisandtestingofasynchronouscircuits |