Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems: November 3 - 5, 1994, Salt Lake City, Utah
Gespeichert in:
| Körperschaft: | |
|---|---|
| Format: | Tagungsbericht Buch |
| Sprache: | English |
| Veröffentlicht: |
Los Alamitos, Calif.
IEEE Computer Society Pr.
1994
|
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | XII, 258 S.: graph. Darst. |
| ISBN: | 0818662107 0818662115 |
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| 245 | 1 | 0 | |a Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems |b November 3 - 5, 1994, Salt Lake City, Utah |c [Ed. production by Mary E. Kavanaugh] |
| 264 | 1 | |a Los Alamitos, Calif. |b IEEE Computer Society Pr. |c 1994 | |
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Datensatz im Suchindex
| _version_ | 1804125698825125888 |
|---|---|
| adam_text | Table
of
Contents
Message
from the
Chairs
ix
Program Committee
xii
I
—
Analysis Tools
Chair: Jens Spars0
—
Technical University of Denmark
Bounded Delay Timing Analysis of a Class of CSP Programs with Choice
2
H. Hulgaard and S.M. Burns
Tools for Validating Asynchronous Digital Circuits
................................................................................ 12
A. Ashkinazy, D. Edwards,
C. Farnsworth, G. Gendel,
and S. Sikand
Timing-Reliability Evaluation of Asynchronous Circuits Based on Different Delay Models
22
M. Kuwako and T. Nanya
II
—
Formal Verification
Chair: David Dill
—
Stanford University, USA
Sufficient Conditions for Correct Gate-Level Speed-Independent Circuits
33
P.A.
Beerei,
J.R. Burch, and T.H-Y.
Meng
Characterizing Speed-Independence of High-Level Designs
44
M. Kishinevsky and J. Staunstrup
Retargeting a Hardware Compiler Proof Using Protocol Converters
54
G. Brown, W.
Luk,
and
J. O Leary
Verification of the Speed-Independent Circuits by STG Unfoldings
64
A. Kondratyev and A. Taubin
III
—
Metastability
Chair: Charles
Moinar
—
Washington University, USA
How Fast Will the Flip Flop?
................................................................................................................77
M.R. Greenstreet and P. Cahoon
Pipeline Synchronization
..........................................................................................................87
J.N. Seizovic
Metastable-Robust Self-Timed Circuit Synthesis from Live Safe Simple Signal
Transition Graphs
97
E. C. Y. Chung and L. Kleetnan
Designing Asynchronous Circuits from Behavioural Specifications with Internal Conflicts
106
J. Cortadella, L. Lavagno, P.
Vanbekbergen,
and A. Yakovlev
IV
—
Practice and Experience
Chair: Ted Williams
—
HaL Computer Systems, USA
Performance Comparison of Asynchronous Adders
117
M.A. Franklin and T. Pan
An Asynchronous Pipelined Lattice Structure Filter
............................................................................... 126
U. V. Cummings, A.M. Lines, and A.J. Martin
Building Fast Bundled Data Circuits with a Specialized Standard Cell Library
134
P.T. R0ine
An Event Controlled
Reconfigurable
Multi-Chip FFT
144
S.V.
Morton,
S.S. Appleton,
and
M. J.
Liebelt
Invited Speaker
—
Ivan Sutherland, V.P. and Fellow, Sun Microsystems Laboratories
Why is Design of Asynchronous Systems Hard? Or Is It Easy?
V
—
Power and Interfacing
Chair: Bill Athas
—
USC
/Information Sciences Institute, USA
A Delay-Controlled Phase-Locked Loop to Reduce Timing Errors in
Synchronous/Asynchronous Communication Links
............................................................................... 156
J.F. Chappel and S.G. Zaky
A Technique for Estimating Power in Asynchronous Circuits
................................................................166
P. Kudva and V. Akella
Low-Energy Asynchronous Memory Design
......................................................................................... 176
J.A.
Tierno
and A.J. Martin
Utilising Dynamic Logic for Low Power Consumption in Asynchronous Circuits
186
С
Farnsworth, D.A. Edwards, and
S.S.
Sikand
VI
—
Formal Methods
Chair: Martin
Rem
—
Eindhoven University, The Netherlands
Efficient Building Blocks for Delay Insensitive Circuits
1%
P.
Patra
and
D.S. Fussel
Formal Design of an Asynchronous DSP Counterflow Pipeline: A Case Study in
Handshake Algebra
.......................................................................................................206
M.B. Josephs, P.G.
Lucassen,
J.
T.
Hading, and
T. Verhoeff
Composable Specifications for Asynchronous Systems Using UNITY
216
M. Bickford
Delay-Insensitive Solutions to the Committee Problem
228
/.
Benko and J. C. Ebergen
VII
—
Testing
Chair: Luciano Lavagno
—
Politecnico di
Torino, Italy
Testing Micropipelines
239
A. Khoche and
E. B
run
vand
Partial Scan Test for Asynchronous Circuits Illustrated on a DCC Error Corrector
247
M. Roncken
Special
Invited
Session — An
Extended Industrial
Design
Example
The Counterflow Pipeline Processor
Ivan Sutherland, Robert Sproull, Dave Roberts, Charles
Moinar,
Ian Jones, Bill
Coates,
Robert Yung, and John Lexau
Author Index
........................................................................................................
25s
|
| any_adam_object | 1 |
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| author_corporate_role | aut |
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| building | Verbundindex |
| bvnumber | BV011202401 |
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| callnumber-subject | TK - Electrical and Nuclear Engineering |
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| dewey-search | 621.39/5 |
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| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Conference Proceeding Book |
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| spelling | International Symposium on Advanced Research in Asynchronous Circuits and Systems 1 1994 Salt Lake City, Utah Verfasser (DE-588)5129801-6 aut Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems November 3 - 5, 1994, Salt Lake City, Utah [Ed. production by Mary E. Kavanaugh] Los Alamitos, Calif. IEEE Computer Society Pr. 1994 XII, 258 S.: graph. Darst. txt rdacontent n rdamedia nc rdacarrier Asynchronous circuits Congresses VLSI (DE-588)4117388-0 gnd rswk-swf Digitaltechnik (DE-588)4012303-0 gnd rswk-swf Computerarchitektur (DE-588)4048717-9 gnd rswk-swf Asynchrones Schaltwerk (DE-588)4271581-7 gnd rswk-swf Flip-Flop (DE-588)4135907-0 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 1994 Salt Lake City Utah gnd-content Asynchrones Schaltwerk (DE-588)4271581-7 s DE-604 Flip-Flop (DE-588)4135907-0 s 1\p DE-604 Computerarchitektur (DE-588)4048717-9 s 2\p DE-604 Digitaltechnik (DE-588)4012303-0 s 3\p DE-604 VLSI (DE-588)4117388-0 s 4\p DE-604 Kavanaugh, Mary E. Sonstige oth Digitalisierung TU Muenchen application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=007513454&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 3\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 4\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems November 3 - 5, 1994, Salt Lake City, Utah Asynchronous circuits Congresses VLSI (DE-588)4117388-0 gnd Digitaltechnik (DE-588)4012303-0 gnd Computerarchitektur (DE-588)4048717-9 gnd Asynchrones Schaltwerk (DE-588)4271581-7 gnd Flip-Flop (DE-588)4135907-0 gnd |
| subject_GND | (DE-588)4117388-0 (DE-588)4012303-0 (DE-588)4048717-9 (DE-588)4271581-7 (DE-588)4135907-0 (DE-588)1071861417 |
| title | Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems November 3 - 5, 1994, Salt Lake City, Utah |
| title_auth | Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems November 3 - 5, 1994, Salt Lake City, Utah |
| title_exact_search | Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems November 3 - 5, 1994, Salt Lake City, Utah |
| title_full | Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems November 3 - 5, 1994, Salt Lake City, Utah [Ed. production by Mary E. Kavanaugh] |
| title_fullStr | Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems November 3 - 5, 1994, Salt Lake City, Utah [Ed. production by Mary E. Kavanaugh] |
| title_full_unstemmed | Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems November 3 - 5, 1994, Salt Lake City, Utah [Ed. production by Mary E. Kavanaugh] |
| title_short | Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems |
| title_sort | proceedings of the international symposium on advanced research in asynchronous circuits and systems november 3 5 1994 salt lake city utah |
| title_sub | November 3 - 5, 1994, Salt Lake City, Utah |
| topic | Asynchronous circuits Congresses VLSI (DE-588)4117388-0 gnd Digitaltechnik (DE-588)4012303-0 gnd Computerarchitektur (DE-588)4048717-9 gnd Asynchrones Schaltwerk (DE-588)4271581-7 gnd Flip-Flop (DE-588)4135907-0 gnd |
| topic_facet | Asynchronous circuits Congresses VLSI Digitaltechnik Computerarchitektur Asynchrones Schaltwerk Flip-Flop Konferenzschrift 1994 Salt Lake City Utah |
| url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=007513454&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
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