Formal methods in computer aided design: first international conference, FMCAD '96, Palo Alto, CA, USA, November 6-8, 1996 ; proceedings
Gespeichert in:
| Format: | Tagungsbericht Buch |
|---|---|
| Sprache: | English |
| Veröffentlicht: |
Berlin u.a.
Springer
1996
|
| Schriftenreihe: | Lecture notes in computer science
1166 |
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | IX, 470 S. |
| ISBN: | 3540619372 |
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| 245 | 1 | 0 | |a Formal methods in computer aided design |b first international conference, FMCAD '96, Palo Alto, CA, USA, November 6-8, 1996 ; proceedings |c Mandayam Srivas ... (eds.) |
| 264 | 1 | |a Berlin u.a. |b Springer |c 1996 | |
| 300 | |a IX, 470 S. | ||
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| 490 | 1 | |a Lecture notes in computer science |v 1166 | |
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| 650 | 4 | |a Circuits intégrés - Vérification - Congrès | |
| 650 | 4 | |a Circuits intégrés numériques - Conception et construction - Informatique - Congrès | |
| 650 | 7 | |a Circuits intégrés numériques - Conception et construction - Informatique - Congrès |2 ram | |
| 650 | 4 | |a Conception assistée par ordinateur - Congrès | |
| 650 | 7 | |a Dessin par ordinateur - Congrès |2 ram | |
| 650 | 7 | |a Micro-elektronica |2 gtt | |
| 650 | 4 | |a Théorèmes - Démonstration automatique - Congrès | |
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| 650 | 7 | |a méthode formelle |2 inriac | |
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| 650 | 4 | |a Automatic theorem proving -- Congresses | |
| 650 | 4 | |a Integrated circuits -- Verification -- Congresses | |
| 650 | 4 | |a Computer engineering -- Computer-aided design -- Congresses | |
| 650 | 4 | |a Formal methods (Computer science) -- Congresses | |
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Datensatz im Suchindex
| _version_ | 1807320454318260224 |
|---|---|
| adam_text |
TABLE
OF
CONTENTS
K.
KEUTZER
THE
NEED
FOR
FORMAL
METHODS
FOR
INTEGRATED
CIRCUIT
DESIGN
1
Y.-A.
CHEN,
E.
CLARKE,
P.-H.
HO,
Y.
HOSKOTE,
T.
KAM,
M.
KHAIRA,
J.
O
'
LEARY,
X.
ZHAO,
VERIFICATION
OF
ALL
CIRCUITS
IN
A
FLOATING-POINT
UNIT
USING
WORD-LEVEL
MODEL
CHECKING
19
L.
ARDITI
BMDS
CAN
DELAY
THE
USE
OF
THEOREM
PROVING
FOR
VERIFYING
ARITHMETIC
ASSEMBLY
INSTRUCTIONS
34
K.
RAVI,
A.
PARDO,
G.D.
HACHTEL,
F.
SOMENZI
MODULAR
VERIFICATION
OF
MULTIPLIERS
49
P.S.
MINER,
J.F.
LEATHRUM,
JR.
VERIFICATION
OF
IEEE
COMPLIANT
SUBTRACTIVE
DIVISION
ALGORITHMS
64
H.
RUEFI
HIERARCHICAL
VERIFICATION
OF
TWO-DIMENSIONAL
HIGH-SPEED
MULTIPLICATION
IN
PVS:
A
CASE
STUDY
79
F.J.
CANTU,
A.
BUNDY,
A.
SMAILL,
D.
BASIN
EXPERIMENTS
IN
AUTOMATING
HARDWARE
VERIFICATION
USING
INDUCTIVE
PROOF
PLANNING
94
A.
JAIN,
K.
NELSON,
R.E.
BRYANT
VERIFYING
NONDETERMINISTIC
IMPLEMENTATIONS
OF
DETERMINISTIC
SYSTEMS
109
D.M.
LEWIN,
D.H.
LORENZ,
S.
UR
A
METHODOLOGY
FOR
PROCESSOR
IMPLEMENTATION
VERIFICATION
126
D.
GEIST,
M.
FARKAS,
A.
LANDVER,
Y.
LICHTENSTEIN,
S.
UR,
Y.
WOLFSTHAL
COVERAGE-DIRECTED
TEST
GENERATION
USING
SYMBOLIC
TECHNIQUES
143
R.B.
JONES,
C.-J.H.
SEGER,
D.L.
DILL
SELF-CONSISTENCY
CHECKING
159
D.
CYRLUK
INVERTING
THE
ABSTRACTION
MAPPING:
A
METHODOLOGY
FOR
HARDWARE
VERIFICATION
172
C.
BARRETT,
D.L.
DILL,
J.
LEVITT
VALIDITY
CHECKING
FOR
COMBINATIONS
OF
THEORIES
WITH
EQUALITY
187
K.
SCHNEIDER,
T.
KROPF
A
UNIFIED
APPROACH
FOR
COMBINING
DIFFERENT
FORMALISMS
FOR
HARDWARE
VERIFICATION
202
R.
HOJATI,
A.
ISLES,
D.
KIRKPATRICK,
R.K.
BRAYTON
VERIFICATION
USING
UNINTERPRETED
FUNCTIONS
AND
FINITE
INSTANTIATIONS
218
VIII
Z.
ZHOU,
X.
SONG,
S.
TAHAR,
E.
CERNY,
F.
CORELLA,
M.
LANGEVIN
FORMAL
VERIFICATION
OF
THE
ISLAND
TUNNEL
CONTROLLER
USING
MULTIWAY
DECISION
GRAPHS
233
R.K.
BRAYTON,
G.D.
HACHTEL,
A.
SANGIOVANNI-VINCENTELLI,
F.
SOMENZI,
A.
AZIZ,
S.-T.
CHENG,
S.A.
EDWARDS,
S.P.
KHATRI,
Y.
KUKIMOTO,
A.
PARDO,
S.
QADEER,
R.K.
RANJAN,
S.
SARWARY,
T.R.
SHIPLE,
G.
SWAMY,
T.
VILLA
VIS
248
N.
SHANKAR
PVS:
COMBINING
SPECIFICATION,
PROOF
CHECKING,
AND
MODEL
CHECKING
257
J.
HARRISON
HOL
LIGHT:
A
TUTORIAL
INTRODUCTION
265
B.
BOSE,
M.
ESEN
TUNA,
V.
CHOPPELLA
A
TUTORIAL
ON
DIGITAL
DESIGN
DERIVATION
USING
DRS
270
B.
BROCK,
M.
KAUFMANN,
JS.
MOORE
ACL2
THEOREMS
ABOUT
COMMERCIAL
MICROPROCESSORS
275
R.
KUMAR,
C.
BLUMENROHR,
D.
EISENBIEGLER,
D.
SCHMID
FORMAL
SYNTHESIS
IN
CIRCUIT
DESIGN-A
CLASSIFICATION
AND
SURVEY
294
M.
BICKFORD,
D.
JAMSEK
FORMAL
SPECIFICATION
AND
VERIFICATION
OF
VHDL
310
N.
NARASIMHAN,
R.
VEMURI
SPECIFICATION
OF
CONTROL
FLOW
PROPERTIES
FOR
VERIFICATION
OF
SYNTHESIZED
VHDL
DESIGNS
327
A.C.J.
FOX,
N.A.
HARMAN
AN
ALGEBRAIC
MODEL
OF
CORRECTNESS
FOR
SUPERSCALAR
MICROPROCESSORS
346
P.J.
WINDLEY,
J.R.
BURCH
MECHANICALLY
CHECKING
A
LEMMA
USED
IN
AN
AUTOMATIC
VERIFICATION
TOOL
362
J.X.
SU,
D.L.
DILL,
C.W.
BARRETT
AUTOMATIC
GENERATION
OF
INVARIANTS
IN
PROCESSOR
VERIFICATION
377
E.M.
SENTOVICH
A
BRIEF
STUDY
OF
BDD
PACKAGE
PERFORMANCE
389
C.
MEINEL,
T.
THEOBALD
LOCAL
ENCODING
TRANSFORMATIONS
FOR
OPTIMIZING
OBDD-REPRESENTATIONS
OF
FINITE
STATE
MACHINES
404
J.
JAIN,
A.
NARAYAN,
C.
COELHO,
S.P.
KHATRI,
A.
SANGIOVANNI-VINCENTELLI,
R.K.
BRAYTON,
M.
FUJITA
DECOMPOSITION
TECHNIQUES
FOR
EFFICIENT
ROBDD
CONSTRUCTION
419
IX
T.
YONEDA,
H.
HATORI,
A.
TAKAHARA,
S-I
MINATO
BDDS
VS.
ZERO-SUPPRESSED
BDDS
:
FOR
CTL
SYMBOLIC
MODEL
CHECKING
OF
PETRI
NETS
D.
BORRIONE,
H.
BOUAMAMA,
D.
DEHARBE,
C.
LE
FAOU,
A.
WAHBA
HDL-BASED
INTEGRATION
OF
FORMAL
METHODS
AND
CAD
TOOLS
IN
THE
PREVAIL
ENVIRONMENT
LIST
OF
AUTHORS
435
450
469 |
| any_adam_object | 1 |
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| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Conference Proceeding Book |
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| genre | (DE-588)1071861417 Konferenzschrift 1996 Palo Alto Calif. gnd-content |
| genre_facet | Konferenzschrift 1996 Palo Alto Calif. |
| id | DE-604.BV011061152 |
| illustrated | Not Illustrated |
| indexdate | 2024-08-14T00:24:56Z |
| institution | BVB |
| institution_GND | (DE-588)2159157-X |
| isbn | 3540619372 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007408185 |
| oclc_num | 35688096 |
| open_access_boolean | |
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| owner_facet | DE-384 DE-739 DE-91G DE-BY-TUM DE-91 DE-BY-TUM DE-19 DE-BY-UBM DE-83 DE-706 |
| physical | IX, 470 S. |
| publishDate | 1996 |
| publishDateSearch | 1996 |
| publishDateSort | 1996 |
| publisher | Springer |
| record_format | marc |
| series | Lecture notes in computer science |
| series2 | Lecture notes in computer science |
| spelling | Formal methods in computer aided design first international conference, FMCAD '96, Palo Alto, CA, USA, November 6-8, 1996 ; proceedings Mandayam Srivas ... (eds.) Berlin u.a. Springer 1996 IX, 470 S. txt rdacontent n rdamedia nc rdacarrier Lecture notes in computer science 1166 CAD gtt CAO inriac Circuits intégrés - Vérification - Congrès Circuits intégrés numériques - Conception et construction - Informatique - Congrès Circuits intégrés numériques - Conception et construction - Informatique - Congrès ram Conception assistée par ordinateur - Congrès Dessin par ordinateur - Congrès ram Micro-elektronica gtt Théorèmes - Démonstration automatique - Congrès Théorèmes - Démonstration automatique - Congrès ram conception circuit inriac méthode formelle inriac vérification inriac Digital integrated circuits -- Computer-aided design -- Congresses Automatic theorem proving -- Congresses Integrated circuits -- Verification -- Congresses Computer engineering -- Computer-aided design -- Congresses Formal methods (Computer science) -- Congresses Formale Methode (DE-588)4333722-3 gnd rswk-swf Verifikation (DE-588)4135577-5 gnd rswk-swf CAD (DE-588)4069794-0 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 1996 Palo Alto Calif. gnd-content CAD (DE-588)4069794-0 s Formale Methode (DE-588)4333722-3 s DE-604 Verifikation (DE-588)4135577-5 s Srivas, Mandayam Sonstige oth FMCAD 1 1996 Palo Alto, Calif. Sonstige (DE-588)2159157-X oth Lecture notes in computer science 1166 (DE-604)BV000000607 1166 DNB Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=007408185&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Formal methods in computer aided design first international conference, FMCAD '96, Palo Alto, CA, USA, November 6-8, 1996 ; proceedings Lecture notes in computer science CAD gtt CAO inriac Circuits intégrés - Vérification - Congrès Circuits intégrés numériques - Conception et construction - Informatique - Congrès Circuits intégrés numériques - Conception et construction - Informatique - Congrès ram Conception assistée par ordinateur - Congrès Dessin par ordinateur - Congrès ram Micro-elektronica gtt Théorèmes - Démonstration automatique - Congrès Théorèmes - Démonstration automatique - Congrès ram conception circuit inriac méthode formelle inriac vérification inriac Digital integrated circuits -- Computer-aided design -- Congresses Automatic theorem proving -- Congresses Integrated circuits -- Verification -- Congresses Computer engineering -- Computer-aided design -- Congresses Formal methods (Computer science) -- Congresses Formale Methode (DE-588)4333722-3 gnd Verifikation (DE-588)4135577-5 gnd CAD (DE-588)4069794-0 gnd |
| subject_GND | (DE-588)4333722-3 (DE-588)4135577-5 (DE-588)4069794-0 (DE-588)1071861417 |
| title | Formal methods in computer aided design first international conference, FMCAD '96, Palo Alto, CA, USA, November 6-8, 1996 ; proceedings |
| title_auth | Formal methods in computer aided design first international conference, FMCAD '96, Palo Alto, CA, USA, November 6-8, 1996 ; proceedings |
| title_exact_search | Formal methods in computer aided design first international conference, FMCAD '96, Palo Alto, CA, USA, November 6-8, 1996 ; proceedings |
| title_full | Formal methods in computer aided design first international conference, FMCAD '96, Palo Alto, CA, USA, November 6-8, 1996 ; proceedings Mandayam Srivas ... (eds.) |
| title_fullStr | Formal methods in computer aided design first international conference, FMCAD '96, Palo Alto, CA, USA, November 6-8, 1996 ; proceedings Mandayam Srivas ... (eds.) |
| title_full_unstemmed | Formal methods in computer aided design first international conference, FMCAD '96, Palo Alto, CA, USA, November 6-8, 1996 ; proceedings Mandayam Srivas ... (eds.) |
| title_short | Formal methods in computer aided design |
| title_sort | formal methods in computer aided design first international conference fmcad 96 palo alto ca usa november 6 8 1996 proceedings |
| title_sub | first international conference, FMCAD '96, Palo Alto, CA, USA, November 6-8, 1996 ; proceedings |
| topic | CAD gtt CAO inriac Circuits intégrés - Vérification - Congrès Circuits intégrés numériques - Conception et construction - Informatique - Congrès Circuits intégrés numériques - Conception et construction - Informatique - Congrès ram Conception assistée par ordinateur - Congrès Dessin par ordinateur - Congrès ram Micro-elektronica gtt Théorèmes - Démonstration automatique - Congrès Théorèmes - Démonstration automatique - Congrès ram conception circuit inriac méthode formelle inriac vérification inriac Digital integrated circuits -- Computer-aided design -- Congresses Automatic theorem proving -- Congresses Integrated circuits -- Verification -- Congresses Computer engineering -- Computer-aided design -- Congresses Formal methods (Computer science) -- Congresses Formale Methode (DE-588)4333722-3 gnd Verifikation (DE-588)4135577-5 gnd CAD (DE-588)4069794-0 gnd |
| topic_facet | CAD CAO Circuits intégrés - Vérification - Congrès Circuits intégrés numériques - Conception et construction - Informatique - Congrès Conception assistée par ordinateur - Congrès Dessin par ordinateur - Congrès Micro-elektronica Théorèmes - Démonstration automatique - Congrès conception circuit méthode formelle vérification Digital integrated circuits -- Computer-aided design -- Congresses Automatic theorem proving -- Congresses Integrated circuits -- Verification -- Congresses Computer engineering -- Computer-aided design -- Congresses Formal methods (Computer science) -- Congresses Formale Methode Verifikation Konferenzschrift 1996 Palo Alto Calif. |
| url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=007408185&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
| volume_link | (DE-604)BV000000607 |
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