Proceedings: Brighton, Great Britain, September 18 - 22, 1995
Gespeichert in:
| Körperschaften: | , |
|---|---|
| Format: | Tagungsbericht Buch |
| Sprache: | English |
| Veröffentlicht: |
Los Alamitos, Calif. [u.a.]
IEEE Computer Soc. Press
1995
|
| Schlagworte: | |
| Beschreibung: | XXVIII, 608 S. Ill., graph. Darst. |
| ISBN: | 0818671564 |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV011040459 | ||
| 003 | DE-604 | ||
| 005 | 19961202 | ||
| 007 | t| | ||
| 008 | 961105s1995 xx ad|| |||| 10||| eng d | ||
| 020 | |a 0818671564 |9 0-8186-7156-4 | ||
| 035 | |a (OCoLC)34284996 | ||
| 035 | |a (DE-599)BVBBV011040459 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-739 |a DE-91 |a DE-29T |a DE-83 |a DE-525 | ||
| 050 | 0 | |a TK7888.4 | |
| 082 | 0 | |a 620.0042 |b Eu74e, 1995 |2 20 | |
| 084 | |a ZN 4000 |0 (DE-625)157336: |2 rvk | ||
| 084 | |a DAT 810f |2 stub | ||
| 111 | 2 | |a EURO-DAC |d 1995 |c Brighton |j Verfasser |0 (DE-588)5175035-1 |4 aut | |
| 245 | 1 | 0 | |a Proceedings |b Brighton, Great Britain, September 18 - 22, 1995 |c EURO-DAC '95, European Design Automation Conference with EURO-VHDL |
| 264 | 1 | |a Los Alamitos, Calif. [u.a.] |b IEEE Computer Soc. Press |c 1995 | |
| 300 | |a XXVIII, 608 S. |b Ill., graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 7 | |a CAO |2 inriac | |
| 650 | 7 | |a Conception assistée par ordinateur - Congrès |2 ram | |
| 650 | 7 | |a VHDL (langage de description de matériel informatique) - Congrès |2 ram | |
| 650 | 7 | |a VHDL |2 inriac | |
| 650 | 7 | |a architecture pipe-line |2 inriac | |
| 650 | 7 | |a circuit analogique |2 inriac | |
| 650 | 7 | |a circuit séquentiel |2 inriac | |
| 650 | 7 | |a débogage |2 inriac | |
| 650 | 7 | |a modélisation erreur |2 inriac | |
| 650 | 7 | |a modélisation information |2 inriac | |
| 650 | 7 | |a optimisation |2 inriac | |
| 650 | 7 | |a partitionnement |2 inriac | |
| 650 | 7 | |a placement |2 inriac | |
| 650 | 7 | |a routage |2 inriac | |
| 650 | 7 | |a simulation |2 inriac | |
| 650 | 7 | |a synthèse logique |2 inriac | |
| 650 | 7 | |a test automatique |2 inriac | |
| 650 | 7 | |a testabilité |2 inriac | |
| 650 | 7 | |a traitement signal numérique |2 inriac | |
| 650 | 7 | |a vérification automatique |2 inriac | |
| 650 | 7 | |a vérification système |2 inriac | |
| 650 | 4 | |a Datenverarbeitung | |
| 650 | 4 | |a Computer-aided design |v Congresses | |
| 650 | 4 | |a Electronic circuit design |x Data processing |v Congresses | |
| 650 | 4 | |a Electronic digital computers |x Circuits |x Design |v Congresses | |
| 650 | 4 | |a VHDL (Computer hardware description language) |v Congresses | |
| 650 | 0 | 7 | |a VHDL |0 (DE-588)4254792-1 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a CAD |0 (DE-588)4069794-0 |2 gnd |9 rswk-swf |
| 655 | 7 | |0 (DE-588)1071861417 |a Konferenzschrift |y 1995 |z Brighton |2 gnd-content | |
| 689 | 0 | 0 | |a VHDL |0 (DE-588)4254792-1 |D s |
| 689 | 0 | |5 DE-604 | |
| 689 | 1 | 0 | |a CAD |0 (DE-588)4069794-0 |D s |
| 689 | 1 | |8 1\p |5 DE-604 | |
| 711 | 2 | |a EURO-VHDL |d 1995 |c Brighton |j Verfasser |0 (DE-588)5175036-3 |4 aut | |
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
| 943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-007392236 | |
Datensatz im Suchindex
| _version_ | 1820868276916322304 |
|---|---|
| adam_text | |
| any_adam_object | |
| author_corporate | EURO-DAC Brighton EURO-VHDL |
| author_corporate_role | aut aut |
| author_facet | EURO-DAC Brighton EURO-VHDL |
| author_sort | EURO-DAC Brighton |
| building | Verbundindex |
| bvnumber | BV011040459 |
| callnumber-first | T - Technology |
| callnumber-label | TK7888 |
| callnumber-raw | TK7888.4 |
| callnumber-search | TK7888.4 |
| callnumber-sort | TK 47888.4 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ZN 4000 |
| classification_tum | DAT 810f |
| ctrlnum | (OCoLC)34284996 (DE-599)BVBBV011040459 |
| dewey-full | 620.0042 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 620 - Engineering and allied operations |
| dewey-raw | 620.0042 |
| dewey-search | 620.0042 |
| dewey-sort | 3620.0042 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Conference Proceeding Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>00000nam a2200000 c 4500</leader><controlfield tag="001">BV011040459</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">19961202</controlfield><controlfield tag="007">t|</controlfield><controlfield tag="008">961105s1995 xx ad|| |||| 10||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0818671564</subfield><subfield code="9">0-8186-7156-4</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)34284996</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV011040459</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-739</subfield><subfield code="a">DE-91</subfield><subfield code="a">DE-29T</subfield><subfield code="a">DE-83</subfield><subfield code="a">DE-525</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7888.4</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">620.0042</subfield><subfield code="b">Eu74e, 1995</subfield><subfield code="2">20</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4000</subfield><subfield code="0">(DE-625)157336:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">DAT 810f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="111" ind1="2" ind2=" "><subfield code="a">EURO-DAC</subfield><subfield code="d">1995</subfield><subfield code="c">Brighton</subfield><subfield code="j">Verfasser</subfield><subfield code="0">(DE-588)5175035-1</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Proceedings</subfield><subfield code="b">Brighton, Great Britain, September 18 - 22, 1995</subfield><subfield code="c">EURO-DAC '95, European Design Automation Conference with EURO-VHDL</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Los Alamitos, Calif. [u.a.]</subfield><subfield code="b">IEEE Computer Soc. Press</subfield><subfield code="c">1995</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XXVIII, 608 S.</subfield><subfield code="b">Ill., graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">CAO</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Conception assistée par ordinateur - Congrès</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">VHDL (langage de description de matériel informatique) - Congrès</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">VHDL</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">architecture pipe-line</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">circuit analogique</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">circuit séquentiel</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">débogage</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">modélisation erreur</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">modélisation information</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">optimisation</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">partitionnement</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">placement</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">routage</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">simulation</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">synthèse logique</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">test automatique</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">testabilité</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">traitement signal numérique</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">vérification automatique</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">vérification système</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Datenverarbeitung</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-aided design</subfield><subfield code="v">Congresses</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuit design</subfield><subfield code="x">Data processing</subfield><subfield code="v">Congresses</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic digital computers</subfield><subfield code="x">Circuits</subfield><subfield code="x">Design</subfield><subfield code="v">Congresses</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">VHDL (Computer hardware description language)</subfield><subfield code="v">Congresses</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VHDL</subfield><subfield code="0">(DE-588)4254792-1</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">CAD</subfield><subfield code="0">(DE-588)4069794-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="0">(DE-588)1071861417</subfield><subfield code="a">Konferenzschrift</subfield><subfield code="y">1995</subfield><subfield code="z">Brighton</subfield><subfield code="2">gnd-content</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VHDL</subfield><subfield code="0">(DE-588)4254792-1</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">CAD</subfield><subfield code="0">(DE-588)4069794-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="711" ind1="2" ind2=" "><subfield code="a">EURO-VHDL</subfield><subfield code="d">1995</subfield><subfield code="c">Brighton</subfield><subfield code="j">Verfasser</subfield><subfield code="0">(DE-588)5175036-3</subfield><subfield code="4">aut</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="943" ind1="1" ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-007392236</subfield></datafield></record></collection> |
| genre | (DE-588)1071861417 Konferenzschrift 1995 Brighton gnd-content |
| genre_facet | Konferenzschrift 1995 Brighton |
| id | DE-604.BV011040459 |
| illustrated | Illustrated |
| indexdate | 2025-01-10T13:21:49Z |
| institution | BVB |
| institution_GND | (DE-588)5175035-1 (DE-588)5175036-3 |
| isbn | 0818671564 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007392236 |
| oclc_num | 34284996 |
| open_access_boolean | |
| owner | DE-739 DE-91 DE-BY-TUM DE-29T DE-83 DE-525 |
| owner_facet | DE-739 DE-91 DE-BY-TUM DE-29T DE-83 DE-525 |
| physical | XXVIII, 608 S. Ill., graph. Darst. |
| publishDate | 1995 |
| publishDateSearch | 1995 |
| publishDateSort | 1995 |
| publisher | IEEE Computer Soc. Press |
| record_format | marc |
| spelling | EURO-DAC 1995 Brighton Verfasser (DE-588)5175035-1 aut Proceedings Brighton, Great Britain, September 18 - 22, 1995 EURO-DAC '95, European Design Automation Conference with EURO-VHDL Los Alamitos, Calif. [u.a.] IEEE Computer Soc. Press 1995 XXVIII, 608 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier CAO inriac Conception assistée par ordinateur - Congrès ram VHDL (langage de description de matériel informatique) - Congrès ram VHDL inriac architecture pipe-line inriac circuit analogique inriac circuit séquentiel inriac débogage inriac modélisation erreur inriac modélisation information inriac optimisation inriac partitionnement inriac placement inriac routage inriac simulation inriac synthèse logique inriac test automatique inriac testabilité inriac traitement signal numérique inriac vérification automatique inriac vérification système inriac Datenverarbeitung Computer-aided design Congresses Electronic circuit design Data processing Congresses Electronic digital computers Circuits Design Congresses VHDL (Computer hardware description language) Congresses VHDL (DE-588)4254792-1 gnd rswk-swf CAD (DE-588)4069794-0 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 1995 Brighton gnd-content VHDL (DE-588)4254792-1 s DE-604 CAD (DE-588)4069794-0 s 1\p DE-604 EURO-VHDL 1995 Brighton Verfasser (DE-588)5175036-3 aut 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Proceedings Brighton, Great Britain, September 18 - 22, 1995 CAO inriac Conception assistée par ordinateur - Congrès ram VHDL (langage de description de matériel informatique) - Congrès ram VHDL inriac architecture pipe-line inriac circuit analogique inriac circuit séquentiel inriac débogage inriac modélisation erreur inriac modélisation information inriac optimisation inriac partitionnement inriac placement inriac routage inriac simulation inriac synthèse logique inriac test automatique inriac testabilité inriac traitement signal numérique inriac vérification automatique inriac vérification système inriac Datenverarbeitung Computer-aided design Congresses Electronic circuit design Data processing Congresses Electronic digital computers Circuits Design Congresses VHDL (Computer hardware description language) Congresses VHDL (DE-588)4254792-1 gnd CAD (DE-588)4069794-0 gnd |
| subject_GND | (DE-588)4254792-1 (DE-588)4069794-0 (DE-588)1071861417 |
| title | Proceedings Brighton, Great Britain, September 18 - 22, 1995 |
| title_auth | Proceedings Brighton, Great Britain, September 18 - 22, 1995 |
| title_exact_search | Proceedings Brighton, Great Britain, September 18 - 22, 1995 |
| title_full | Proceedings Brighton, Great Britain, September 18 - 22, 1995 EURO-DAC '95, European Design Automation Conference with EURO-VHDL |
| title_fullStr | Proceedings Brighton, Great Britain, September 18 - 22, 1995 EURO-DAC '95, European Design Automation Conference with EURO-VHDL |
| title_full_unstemmed | Proceedings Brighton, Great Britain, September 18 - 22, 1995 EURO-DAC '95, European Design Automation Conference with EURO-VHDL |
| title_short | Proceedings |
| title_sort | proceedings brighton great britain september 18 22 1995 |
| title_sub | Brighton, Great Britain, September 18 - 22, 1995 |
| topic | CAO inriac Conception assistée par ordinateur - Congrès ram VHDL (langage de description de matériel informatique) - Congrès ram VHDL inriac architecture pipe-line inriac circuit analogique inriac circuit séquentiel inriac débogage inriac modélisation erreur inriac modélisation information inriac optimisation inriac partitionnement inriac placement inriac routage inriac simulation inriac synthèse logique inriac test automatique inriac testabilité inriac traitement signal numérique inriac vérification automatique inriac vérification système inriac Datenverarbeitung Computer-aided design Congresses Electronic circuit design Data processing Congresses Electronic digital computers Circuits Design Congresses VHDL (Computer hardware description language) Congresses VHDL (DE-588)4254792-1 gnd CAD (DE-588)4069794-0 gnd |
| topic_facet | CAO Conception assistée par ordinateur - Congrès VHDL (langage de description de matériel informatique) - Congrès VHDL architecture pipe-line circuit analogique circuit séquentiel débogage modélisation erreur modélisation information optimisation partitionnement placement routage simulation synthèse logique test automatique testabilité traitement signal numérique vérification automatique vérification système Datenverarbeitung Computer-aided design Congresses Electronic circuit design Data processing Congresses Electronic digital computers Circuits Design Congresses VHDL (Computer hardware description language) Congresses CAD Konferenzschrift 1995 Brighton |
| work_keys_str_mv | AT eurodacbrighton proceedingsbrightongreatbritainseptember18221995 AT eurovhdlbrighton proceedingsbrightongreatbritainseptember18221995 |