Applying inter-cluster shared memory architecture to a parallel inference machine:
Abstract: "This paper discusses the feasibility of a parallel inference machine with the inter-cluster shared memory architecture in stead [sic] of the message passing mechanism. The discussion includes two possible memory architectures which fit to the memory access features, and the system so...
Saved in:
| Format: | Book |
|---|---|
| Language: | English |
| Published: |
Tokyo, Japan
1992
|
| Series: | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report
769 |
| Subjects: | |
| Summary: | Abstract: "This paper discusses the feasibility of a parallel inference machine with the inter-cluster shared memory architecture in stead [sic] of the message passing mechanism. The discussion includes two possible memory architectures which fit to the memory access features, and the system software under the proposed memory architecture. Although the main objective is the smaller latency of the remote memory access, additional advantages are also discussed." |
| Physical Description: | 6 S. |
Staff View
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| 520 | 3 | |a Abstract: "This paper discusses the feasibility of a parallel inference machine with the inter-cluster shared memory architecture in stead [sic] of the message passing mechanism. The discussion includes two possible memory architectures which fit to the memory access features, and the system software under the proposed memory architecture. Although the main objective is the smaller latency of the remote memory access, additional advantages are also discussed." | |
| 650 | 4 | |a Fifth generation computers | |
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| 650 | 4 | |a Parallel processing (Electronic computers) | |
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| id | DE-604.BV010956781 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T18:01:39Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007328876 |
| oclc_num | 27424315 |
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| physical | 6 S. |
| publishDate | 1992 |
| publishDateSearch | 1992 |
| publishDateSort | 1992 |
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| series | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |
| series2 | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |
| spelling | Applying inter-cluster shared memory architecture to a parallel inference machine by H. Sakai ... Tokyo, Japan 1992 6 S. txt rdacontent n rdamedia nc rdacarrier Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report 769 Abstract: "This paper discusses the feasibility of a parallel inference machine with the inter-cluster shared memory architecture in stead [sic] of the message passing mechanism. The discussion includes two possible memory architectures which fit to the memory access features, and the system software under the proposed memory architecture. Although the main objective is the smaller latency of the remote memory access, additional advantages are also discussed." Fifth generation computers KL1 (Computer program language) Logic programming Parallel processing (Electronic computers) Sakai, Hiroshi Sonstige oth Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report 769 (DE-604)BV010923438 769 |
| spellingShingle | Applying inter-cluster shared memory architecture to a parallel inference machine Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report Fifth generation computers KL1 (Computer program language) Logic programming Parallel processing (Electronic computers) |
| title | Applying inter-cluster shared memory architecture to a parallel inference machine |
| title_auth | Applying inter-cluster shared memory architecture to a parallel inference machine |
| title_exact_search | Applying inter-cluster shared memory architecture to a parallel inference machine |
| title_full | Applying inter-cluster shared memory architecture to a parallel inference machine by H. Sakai ... |
| title_fullStr | Applying inter-cluster shared memory architecture to a parallel inference machine by H. Sakai ... |
| title_full_unstemmed | Applying inter-cluster shared memory architecture to a parallel inference machine by H. Sakai ... |
| title_short | Applying inter-cluster shared memory architecture to a parallel inference machine |
| title_sort | applying inter cluster shared memory architecture to a parallel inference machine |
| topic | Fifth generation computers KL1 (Computer program language) Logic programming Parallel processing (Electronic computers) |
| topic_facet | Fifth generation computers KL1 (Computer program language) Logic programming Parallel processing (Electronic computers) |
| volume_link | (DE-604)BV010923438 |
| work_keys_str_mv | AT sakaihiroshi applyinginterclustersharedmemoryarchitecturetoaparallelinferencemachine |