Abstract: "This paper proposes and evaluates the hardware implementation required for dynamic load balancing in the prototype PIM/c of the Parallel Inference Machine (PIM). On one hand, PIM/c is configured along a hierarchical structure of loosely coupled TCMP clusters (TCMP -- Tightly-Coupled...

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Format:	Buch
Sprache:	English
Veröffentlicht:	Tokyo, Japan 1991
Schriftenreihe:	Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report 704
Schlagworte:	Fifth generation computers Parallel processing (Electronic computers)
Zusammenfassung:	Abstract: "This paper proposes and evaluates the hardware implementation required for dynamic load balancing in the prototype PIM/c of the Parallel Inference Machine (PIM). On one hand, PIM/c is configured along a hierarchical structure of loosely coupled TCMP clusters (TCMP -- Tightly-Coupled Multi-Processors) in order to utilize the high locality of logic programs. On the other hand, an LCMP (Loosely-Coupled Multi- Processors) approach enables us to build a more scalable machine using a crossbar network. Load balancing algorithms and corresponding hardware suitable for each hierarchy are used. First, for dynamic load balancing in the TCMP hierarchy, we propose a register with broadcast facility to request load dispatching The evaluation determines the overhead due to memory polling in order to detect the request. The proposed hardware reduces the execution time of logic programs by 15%. Second, for dynamic load balancing in the LCMP hierarchy, we propose the use of a shortcut path to request the value of a total load within a cluster. The evaluation shows that the overhead due to the request of that value is reduced as a result of introducing the shortcut path. Consequently the proposed hardware reduces the processing time by 50%. The results obtained confirm that the use of hardware mechanisms reduces the overhead due to the dynamic load balancing.
Beschreibung:	13 S.