Fundamental characteristics of the snooping cache in a parallel inference machine:
Abstract: "The design concepts of the snooping cache for a Parallel Inference Machine (the PIM/c prototype) are discussed and the cache's performance is investigated in detail. The snooping cache control mechanism was implemented on a single VLSI chip, and embedded in the PIM/c prototype t...
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| Format: | Book |
|---|---|
| Language: | English |
| Published: |
Tokyo, Japan
1991
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| Series: | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report
656 |
| Subjects: | |
| Summary: | Abstract: "The design concepts of the snooping cache for a Parallel Inference Machine (the PIM/c prototype) are discussed and the cache's performance is investigated in detail. The snooping cache control mechanism was implemented on a single VLSI chip, and embedded in the PIM/c prototype to evaluate its actual performance. As the focus of this evaluation using a real machine is to clarify the fundamental characteristics of the snooping cache, we carried out the experiments by controlling the various parameters of the cache access patterns, instead of running specific benchmark programs. The results of the performance evaluation proved advantages of the snooping cache protocol such as an invalidation scheme and inter-cache data transfer mechanism Finally, the design features of the cache architecture are examined to find directions for further improvement. |
| Physical Description: | 36 S. graph. Darst. |
Staff View
MARC
| LEADER | 00000nam a2200000 cb4500 | ||
|---|---|---|---|
| 001 | BV010954320 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | t | ||
| 008 | 960917s1991 d||| |||| 00||| engod | ||
| 035 | |a (OCoLC)26293298 | ||
| 035 | |a (DE-599)BVBBV010954320 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-91G | ||
| 245 | 1 | 0 | |a Fundamental characteristics of the snooping cache in a parallel inference machine |c by T. Tarui ... |
| 264 | 1 | |a Tokyo, Japan |c 1991 | |
| 300 | |a 36 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 1 | |a Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |v 656 | |
| 520 | 3 | |a Abstract: "The design concepts of the snooping cache for a Parallel Inference Machine (the PIM/c prototype) are discussed and the cache's performance is investigated in detail. The snooping cache control mechanism was implemented on a single VLSI chip, and embedded in the PIM/c prototype to evaluate its actual performance. As the focus of this evaluation using a real machine is to clarify the fundamental characteristics of the snooping cache, we carried out the experiments by controlling the various parameters of the cache access patterns, instead of running specific benchmark programs. The results of the performance evaluation proved advantages of the snooping cache protocol such as an invalidation scheme and inter-cache data transfer mechanism | |
| 520 | 3 | |a Finally, the design features of the cache architecture are examined to find directions for further improvement. | |
| 650 | 4 | |a Cache memory | |
| 650 | 4 | |a Fifth generation computers | |
| 700 | 1 | |a Tarui, Toshiaki |e Sonstige |4 oth | |
| 830 | 0 | |a Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |v 656 |w (DE-604)BV010923438 |9 656 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-007326685 | ||
Record in the Search Index
| _version_ | 1804125441229848576 |
|---|---|
| any_adam_object | |
| building | Verbundindex |
| bvnumber | BV010954320 |
| ctrlnum | (OCoLC)26293298 (DE-599)BVBBV010954320 |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01887nam a2200313 cb4500</leader><controlfield tag="001">BV010954320</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">960917s1991 d||| |||| 00||| engod</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)26293298</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV010954320</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91G</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Fundamental characteristics of the snooping cache in a parallel inference machine</subfield><subfield code="c">by T. Tarui ...</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Tokyo, Japan</subfield><subfield code="c">1991</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">36 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report</subfield><subfield code="v">656</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">Abstract: "The design concepts of the snooping cache for a Parallel Inference Machine (the PIM/c prototype) are discussed and the cache's performance is investigated in detail. The snooping cache control mechanism was implemented on a single VLSI chip, and embedded in the PIM/c prototype to evaluate its actual performance. As the focus of this evaluation using a real machine is to clarify the fundamental characteristics of the snooping cache, we carried out the experiments by controlling the various parameters of the cache access patterns, instead of running specific benchmark programs. The results of the performance evaluation proved advantages of the snooping cache protocol such as an invalidation scheme and inter-cache data transfer mechanism</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">Finally, the design features of the cache architecture are examined to find directions for further improvement.</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Cache memory</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Fifth generation computers</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Tarui, Toshiaki</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report</subfield><subfield code="v">656</subfield><subfield code="w">(DE-604)BV010923438</subfield><subfield code="9">656</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-007326685</subfield></datafield></record></collection> |
| id | DE-604.BV010954320 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T18:01:36Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007326685 |
| oclc_num | 26293298 |
| open_access_boolean | |
| owner | DE-91G DE-BY-TUM |
| owner_facet | DE-91G DE-BY-TUM |
| physical | 36 S. graph. Darst. |
| publishDate | 1991 |
| publishDateSearch | 1991 |
| publishDateSort | 1991 |
| record_format | marc |
| series | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |
| series2 | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |
| spelling | Fundamental characteristics of the snooping cache in a parallel inference machine by T. Tarui ... Tokyo, Japan 1991 36 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report 656 Abstract: "The design concepts of the snooping cache for a Parallel Inference Machine (the PIM/c prototype) are discussed and the cache's performance is investigated in detail. The snooping cache control mechanism was implemented on a single VLSI chip, and embedded in the PIM/c prototype to evaluate its actual performance. As the focus of this evaluation using a real machine is to clarify the fundamental characteristics of the snooping cache, we carried out the experiments by controlling the various parameters of the cache access patterns, instead of running specific benchmark programs. The results of the performance evaluation proved advantages of the snooping cache protocol such as an invalidation scheme and inter-cache data transfer mechanism Finally, the design features of the cache architecture are examined to find directions for further improvement. Cache memory Fifth generation computers Tarui, Toshiaki Sonstige oth Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report 656 (DE-604)BV010923438 656 |
| spellingShingle | Fundamental characteristics of the snooping cache in a parallel inference machine Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report Cache memory Fifth generation computers |
| title | Fundamental characteristics of the snooping cache in a parallel inference machine |
| title_auth | Fundamental characteristics of the snooping cache in a parallel inference machine |
| title_exact_search | Fundamental characteristics of the snooping cache in a parallel inference machine |
| title_full | Fundamental characteristics of the snooping cache in a parallel inference machine by T. Tarui ... |
| title_fullStr | Fundamental characteristics of the snooping cache in a parallel inference machine by T. Tarui ... |
| title_full_unstemmed | Fundamental characteristics of the snooping cache in a parallel inference machine by T. Tarui ... |
| title_short | Fundamental characteristics of the snooping cache in a parallel inference machine |
| title_sort | fundamental characteristics of the snooping cache in a parallel inference machine |
| topic | Cache memory Fifth generation computers |
| topic_facet | Cache memory Fifth generation computers |
| volume_link | (DE-604)BV010923438 |
| work_keys_str_mv | AT taruitoshiaki fundamentalcharacteristicsofthesnoopingcacheinaparallelinferencemachine |