Evaluation of inter-processor communication in the KL1 implementation on the Multi-PSI:

Abstract: "The Japanese fifth generation computer project has the target of building a highly parallel inference machine (PIM) on which to construct large-scale knowledge information systems. We developed a prototype, the Multi-PSI, for the purpose of providing a practical tool for research and...

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Bibliographische Detailangaben
Hauptverfasser: Nakajima, Katsuto (VerfasserIn), Ichiyoshi, Nobuyuki (VerfasserIn)
Format: Buch
Sprache:English
Veröffentlicht: Tokyo, Japan 1990
Schriftenreihe:Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report 531
Schlagworte:
Zusammenfassung:Abstract: "The Japanese fifth generation computer project has the target of building a highly parallel inference machine (PIM) on which to construct large-scale knowledge information systems. We developed a prototype, the Multi-PSI, for the purpose of providing a practical tool for research and development of parallel non-numeric software. It also served as a testbed for implementation of concurrent logic language KL1 on a loosely-coupled multiprocessor. The design rationale was to obtain a high overall performance, taking account of garbage collection overhead, and to decentralize management information for scalability
This paper gives the measurement results of inter-processor operations in the system, both in absolute terms (cost of primitive operations) and in relative terms (rate of communication overhead in benchmark programs), and determines the bottlenecks in the performance of inter-processor operations. The measurements in the benchmark programs show that the bandwidth of the network hardware is much larger than the actual message traffic, and it is expected to remain so for larger configurations such as a 32 x 32 mesh network (1,024 processors).
Beschreibung:20 S. graph. Darst.

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