PIM p, a hierarchical parallel inference machine:
Abstract: "This paper presents and evaluates the main architectural features of a parallel inference machine, PIM/p, which is now being developed for the high-speed execution of AI programs written in the concurrent logic programming language KL1, PIM/p has a hierarchical structure where eight...
Gespeichert in:
Format: | Buch |
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Sprache: | English |
Veröffentlicht: |
Tokyo, Japan
1989
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Schriftenreihe: | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report
514 |
Schlagworte: | |
Zusammenfassung: | Abstract: "This paper presents and evaluates the main architectural features of a parallel inference machine, PIM/p, which is now being developed for the high-speed execution of AI programs written in the concurrent logic programming language KL1, PIM/p has a hierarchical structure where eight processing elements are combined with shared memory to form a cluster, and more than sixteen clusters are connected by a hypercube network. To decrease the numver of code fetches on the common bus of a cluster, we have developed a macro instruction call mechanism that allows high-level instructions to be executed in the otherwise RISC-like instruction stream. Some software controlled cache memory assist instructions have also been introduced to delete unneeded operand data transfers on the common bus. Simulation has shown their effectiveness. We also evaluated the application of the two main deadlock-free routing methods to the intercluster network, and selected the E-cube method because of its relatively good performance and simple hardware." |
Beschreibung: | 6 S. graph. Darst. |
Internformat
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490 | 1 | |a Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |v 514 | |
520 | 3 | |a Abstract: "This paper presents and evaluates the main architectural features of a parallel inference machine, PIM/p, which is now being developed for the high-speed execution of AI programs written in the concurrent logic programming language KL1, PIM/p has a hierarchical structure where eight processing elements are combined with shared memory to form a cluster, and more than sixteen clusters are connected by a hypercube network. To decrease the numver of code fetches on the common bus of a cluster, we have developed a macro instruction call mechanism that allows high-level instructions to be executed in the otherwise RISC-like instruction stream. Some software controlled cache memory assist instructions have also been introduced to delete unneeded operand data transfers on the common bus. Simulation has shown their effectiveness. We also evaluated the application of the two main deadlock-free routing methods to the intercluster network, and selected the E-cube method because of its relatively good performance and simple hardware." | |
650 | 4 | |a Inference | |
650 | 4 | |a Logic programming | |
650 | 4 | |a Parallel programming (Computer science) | |
700 | 1 | |a Hattori, Akira |e Sonstige |4 oth | |
830 | 0 | |a Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |v 514 |w (DE-604)BV010923438 |9 514 | |
999 | |a oai:aleph.bib-bvb.de:BVB01-007323278 |
Datensatz im Suchindex
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bvnumber | BV010949366 |
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id | DE-604.BV010949366 |
illustrated | Illustrated |
indexdate | 2024-07-09T18:01:32Z |
institution | BVB |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007323278 |
oclc_num | 22536649 |
open_access_boolean | |
owner | DE-91G DE-BY-TUM |
owner_facet | DE-91G DE-BY-TUM |
physical | 6 S. graph. Darst. |
publishDate | 1989 |
publishDateSearch | 1989 |
publishDateSort | 1989 |
record_format | marc |
series | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |
series2 | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |
spelling | PIM p, a hierarchical parallel inference machine by A. Hattori ... Tokyo, Japan 1989 6 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report 514 Abstract: "This paper presents and evaluates the main architectural features of a parallel inference machine, PIM/p, which is now being developed for the high-speed execution of AI programs written in the concurrent logic programming language KL1, PIM/p has a hierarchical structure where eight processing elements are combined with shared memory to form a cluster, and more than sixteen clusters are connected by a hypercube network. To decrease the numver of code fetches on the common bus of a cluster, we have developed a macro instruction call mechanism that allows high-level instructions to be executed in the otherwise RISC-like instruction stream. Some software controlled cache memory assist instructions have also been introduced to delete unneeded operand data transfers on the common bus. Simulation has shown their effectiveness. We also evaluated the application of the two main deadlock-free routing methods to the intercluster network, and selected the E-cube method because of its relatively good performance and simple hardware." Inference Logic programming Parallel programming (Computer science) Hattori, Akira Sonstige oth Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report 514 (DE-604)BV010923438 514 |
spellingShingle | PIM p, a hierarchical parallel inference machine Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report Inference Logic programming Parallel programming (Computer science) |
title | PIM p, a hierarchical parallel inference machine |
title_auth | PIM p, a hierarchical parallel inference machine |
title_exact_search | PIM p, a hierarchical parallel inference machine |
title_full | PIM p, a hierarchical parallel inference machine by A. Hattori ... |
title_fullStr | PIM p, a hierarchical parallel inference machine by A. Hattori ... |
title_full_unstemmed | PIM p, a hierarchical parallel inference machine by A. Hattori ... |
title_short | PIM p, a hierarchical parallel inference machine |
title_sort | pim p a hierarchical parallel inference machine |
topic | Inference Logic programming Parallel programming (Computer science) |
topic_facet | Inference Logic programming Parallel programming (Computer science) |
volume_link | (DE-604)BV010923438 |
work_keys_str_mv | AT hattoriakira pimpahierarchicalparallelinferencemachine |