The FGCS computing architecture:
Abstract: "In the fifth generation computer systems (FGCS) project of Japan, logic programming and parallel processing are adopted as the principles of both software and hardware system development. Their amalgamation, parallel inference systems, is being investigated at ICOT. Both hardware and...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Tokyo, Japan
1989
|
| Schlagworte: | |
| Zusammenfassung: | Abstract: "In the fifth generation computer systems (FGCS) project of Japan, logic programming and parallel processing are adopted as the principles of both software and hardware system development. Their amalgamation, parallel inference systems, is being investigated at ICOT. Both hardware and software development have been carried out based on the kernel language (KL1) as the software-hardware interface. KL1 is a concurrent logic programming language extended from flat GHC. The hardware development target is a parallel inference machine (PIM) with about 10 p3 s element processors A smaller scale prototype machine, PIM/p, with about 10 p2 s processors is under development. The processors are dedicated for efficient execution of KL1 programs on a distributed implementation of the KL1 language processor. One major software project is the development of a common operating system for all the parallel inference machine named PIMOS (parallel inference machine operating system), which prototype has been working. Several program development environments have also been prepared. The Multi-PSI, another inference machine prototype, is one such powerful environment, which connects up to 64 personal sequential inference machines (PSI-II) relatively loosely Further improvements of the PIMOS, and research on various concurrent algorithms and load distribution schemes are in progress on the Multi-PSI. |
| Beschreibung: | 6 S. |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV010947153 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | t | ||
| 008 | 960912s1989 |||| 00||| engod | ||
| 035 | |a (OCoLC)23004667 | ||
| 035 | |a (DE-599)BVBBV010947153 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-91G | ||
| 100 | 1 | |a Taki, Kazuo |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a The FGCS computing architecture |c by K. Taki |
| 264 | 1 | |a Tokyo, Japan |c 1989 | |
| 300 | |a 6 S. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 520 | 3 | |a Abstract: "In the fifth generation computer systems (FGCS) project of Japan, logic programming and parallel processing are adopted as the principles of both software and hardware system development. Their amalgamation, parallel inference systems, is being investigated at ICOT. Both hardware and software development have been carried out based on the kernel language (KL1) as the software-hardware interface. KL1 is a concurrent logic programming language extended from flat GHC. The hardware development target is a parallel inference machine (PIM) with about 10 p3 s element processors | |
| 520 | 3 | |a A smaller scale prototype machine, PIM/p, with about 10 p2 s processors is under development. The processors are dedicated for efficient execution of KL1 programs on a distributed implementation of the KL1 language processor. One major software project is the development of a common operating system for all the parallel inference machine named PIMOS (parallel inference machine operating system), which prototype has been working. Several program development environments have also been prepared. The Multi-PSI, another inference machine prototype, is one such powerful environment, which connects up to 64 personal sequential inference machines (PSI-II) relatively loosely | |
| 520 | 3 | |a Further improvements of the PIMOS, and research on various concurrent algorithms and load distribution schemes are in progress on the Multi-PSI. | |
| 650 | 4 | |a Fifth generation computers |z Japan | |
| 650 | 4 | |a Logic programming | |
| 650 | 4 | |a Parallel processing (Electronic computers) | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-007321371 | ||
Datensatz im Suchindex
| _version_ | 1804125433782861824 |
|---|---|
| any_adam_object | |
| author | Taki, Kazuo |
| author_facet | Taki, Kazuo |
| author_role | aut |
| author_sort | Taki, Kazuo |
| author_variant | k t kt |
| building | Verbundindex |
| bvnumber | BV010947153 |
| ctrlnum | (OCoLC)23004667 (DE-599)BVBBV010947153 |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02224nam a2200313 c 4500</leader><controlfield tag="001">BV010947153</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">960912s1989 |||| 00||| engod</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)23004667</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV010947153</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91G</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Taki, Kazuo</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">The FGCS computing architecture</subfield><subfield code="c">by K. Taki</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Tokyo, Japan</subfield><subfield code="c">1989</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">6 S.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">Abstract: "In the fifth generation computer systems (FGCS) project of Japan, logic programming and parallel processing are adopted as the principles of both software and hardware system development. Their amalgamation, parallel inference systems, is being investigated at ICOT. Both hardware and software development have been carried out based on the kernel language (KL1) as the software-hardware interface. KL1 is a concurrent logic programming language extended from flat GHC. The hardware development target is a parallel inference machine (PIM) with about 10 p3 s element processors</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">A smaller scale prototype machine, PIM/p, with about 10 p2 s processors is under development. The processors are dedicated for efficient execution of KL1 programs on a distributed implementation of the KL1 language processor. One major software project is the development of a common operating system for all the parallel inference machine named PIMOS (parallel inference machine operating system), which prototype has been working. Several program development environments have also been prepared. The Multi-PSI, another inference machine prototype, is one such powerful environment, which connects up to 64 personal sequential inference machines (PSI-II) relatively loosely</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">Further improvements of the PIMOS, and research on various concurrent algorithms and load distribution schemes are in progress on the Multi-PSI.</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Fifth generation computers</subfield><subfield code="z">Japan</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic programming</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Parallel processing (Electronic computers)</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-007321371</subfield></datafield></record></collection> |
| id | DE-604.BV010947153 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T18:01:29Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007321371 |
| oclc_num | 23004667 |
| open_access_boolean | |
| owner | DE-91G DE-BY-TUM |
| owner_facet | DE-91G DE-BY-TUM |
| physical | 6 S. |
| publishDate | 1989 |
| publishDateSearch | 1989 |
| publishDateSort | 1989 |
| record_format | marc |
| spelling | Taki, Kazuo Verfasser aut The FGCS computing architecture by K. Taki Tokyo, Japan 1989 6 S. txt rdacontent n rdamedia nc rdacarrier Abstract: "In the fifth generation computer systems (FGCS) project of Japan, logic programming and parallel processing are adopted as the principles of both software and hardware system development. Their amalgamation, parallel inference systems, is being investigated at ICOT. Both hardware and software development have been carried out based on the kernel language (KL1) as the software-hardware interface. KL1 is a concurrent logic programming language extended from flat GHC. The hardware development target is a parallel inference machine (PIM) with about 10 p3 s element processors A smaller scale prototype machine, PIM/p, with about 10 p2 s processors is under development. The processors are dedicated for efficient execution of KL1 programs on a distributed implementation of the KL1 language processor. One major software project is the development of a common operating system for all the parallel inference machine named PIMOS (parallel inference machine operating system), which prototype has been working. Several program development environments have also been prepared. The Multi-PSI, another inference machine prototype, is one such powerful environment, which connects up to 64 personal sequential inference machines (PSI-II) relatively loosely Further improvements of the PIMOS, and research on various concurrent algorithms and load distribution schemes are in progress on the Multi-PSI. Fifth generation computers Japan Logic programming Parallel processing (Electronic computers) |
| spellingShingle | Taki, Kazuo The FGCS computing architecture Fifth generation computers Japan Logic programming Parallel processing (Electronic computers) |
| title | The FGCS computing architecture |
| title_auth | The FGCS computing architecture |
| title_exact_search | The FGCS computing architecture |
| title_full | The FGCS computing architecture by K. Taki |
| title_fullStr | The FGCS computing architecture by K. Taki |
| title_full_unstemmed | The FGCS computing architecture by K. Taki |
| title_short | The FGCS computing architecture |
| title_sort | the fgcs computing architecture |
| topic | Fifth generation computers Japan Logic programming Parallel processing (Electronic computers) |
| topic_facet | Fifth generation computers Japan Logic programming Parallel processing (Electronic computers) |
| work_keys_str_mv | AT takikazuo thefgcscomputingarchitecture |