APA (7th ed.) Citation

Goto, A., Matsumoto, A., & Tich, E. (1988). Design and performance of a coherent cache for parallel logic programming architectures.

Chicago Style (17th ed.) Citation

Goto, Atsuhiro, Akira Matsumoto, and Evan Tich. Design and Performance of a Coherent Cache for Parallel Logic Programming Architectures. Tokyo, Japan, 1988.

MLA (9th ed.) Citation

Goto, Atsuhiro, et al. Design and Performance of a Coherent Cache for Parallel Logic Programming Architectures. 1988.