Load-dispatching strategy on parallel inference machine:
Abstract: "Load-dispatching strategies are proposed for a parallel inference machine prototype, and their performance are evaluated by the simulation based on the loosely-coupled cluster model, using 6-queens benchmark. Sender-initiate concept is appropriate to the bunch layer of a parallel inf...
Gespeichert in:
Format: | Buch |
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Sprache: | English |
Veröffentlicht: |
Tokyo, Japan
1988
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Schriftenreihe: | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report
371 |
Schlagworte: | |
Zusammenfassung: | Abstract: "Load-dispatching strategies are proposed for a parallel inference machine prototype, and their performance are evaluated by the simulation based on the loosely-coupled cluster model, using 6-queens benchmark. Sender-initiate concept is appropriate to the bunch layer of a parallel inference machine prototype. The strategy in which the cluster with maximum ready goals dispatches a goal to the cluster with minimum ready goals brings the lowest load-dispatching rate limit, but it is not expected to realize stable performance at real program execution, since it covers too narrow load-dispatching rate region The strategy in which the goal dispatch target cluster is determined at random and then this goal dispatch is aborted on the condition that the dispatch target cluster has more ready goals than the dispatching cluster or on the condition that the dispatching cluster has fewer ready goals than the threshold brings the second lowest load-displacing rate limit and is expected to realize high performance stably at real program execution. More than 70% averaged utilization is achieved in the region that the load-displacing rate is higher than 5%. It is confirmed that 0.54 of the maximum performance of a parallel inference machine prototype can be achieved by applying this load-dispatching strategy. |
Beschreibung: | 15 S. graph. Darst. |
Internformat
MARC
LEADER | 00000nam a2200000 cb4500 | ||
---|---|---|---|
001 | BV010943285 | ||
003 | DE-604 | ||
005 | 00000000000000.0 | ||
007 | t | ||
008 | 960910s1988 d||| |||| 00||| engod | ||
035 | |a (OCoLC)21184171 | ||
035 | |a (DE-599)BVBBV010943285 | ||
040 | |a DE-604 |b ger |e rakddb | ||
041 | 0 | |a eng | |
049 | |a DE-91G | ||
245 | 1 | 0 | |a Load-dispatching strategy on parallel inference machine |c M. Sugie ... |
264 | 1 | |a Tokyo, Japan |c 1988 | |
300 | |a 15 S. |b graph. Darst. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
490 | 1 | |a Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |v 371 | |
520 | 3 | |a Abstract: "Load-dispatching strategies are proposed for a parallel inference machine prototype, and their performance are evaluated by the simulation based on the loosely-coupled cluster model, using 6-queens benchmark. Sender-initiate concept is appropriate to the bunch layer of a parallel inference machine prototype. The strategy in which the cluster with maximum ready goals dispatches a goal to the cluster with minimum ready goals brings the lowest load-dispatching rate limit, but it is not expected to realize stable performance at real program execution, since it covers too narrow load-dispatching rate region | |
520 | 3 | |a The strategy in which the goal dispatch target cluster is determined at random and then this goal dispatch is aborted on the condition that the dispatch target cluster has more ready goals than the dispatching cluster or on the condition that the dispatching cluster has fewer ready goals than the threshold brings the second lowest load-displacing rate limit and is expected to realize high performance stably at real program execution. More than 70% averaged utilization is achieved in the region that the load-displacing rate is higher than 5%. It is confirmed that 0.54 of the maximum performance of a parallel inference machine prototype can be achieved by applying this load-dispatching strategy. | |
650 | 4 | |a Logic programming | |
650 | 4 | |a Machine theory | |
650 | 4 | |a Parallel processing (Electronic computers) | |
700 | 1 | |a Sugie, M. |e Sonstige |4 oth | |
830 | 0 | |a Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |v 371 |w (DE-604)BV010923438 |9 371 | |
999 | |a oai:aleph.bib-bvb.de:BVB01-007318404 |
Datensatz im Suchindex
_version_ | 1804125429997502464 |
---|---|
any_adam_object | |
building | Verbundindex |
bvnumber | BV010943285 |
ctrlnum | (OCoLC)21184171 (DE-599)BVBBV010943285 |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02360nam a2200325 cb4500</leader><controlfield tag="001">BV010943285</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">960910s1988 d||| |||| 00||| engod</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)21184171</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV010943285</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91G</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Load-dispatching strategy on parallel inference machine</subfield><subfield code="c">M. Sugie ...</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Tokyo, Japan</subfield><subfield code="c">1988</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">15 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report</subfield><subfield code="v">371</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">Abstract: "Load-dispatching strategies are proposed for a parallel inference machine prototype, and their performance are evaluated by the simulation based on the loosely-coupled cluster model, using 6-queens benchmark. Sender-initiate concept is appropriate to the bunch layer of a parallel inference machine prototype. The strategy in which the cluster with maximum ready goals dispatches a goal to the cluster with minimum ready goals brings the lowest load-dispatching rate limit, but it is not expected to realize stable performance at real program execution, since it covers too narrow load-dispatching rate region</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">The strategy in which the goal dispatch target cluster is determined at random and then this goal dispatch is aborted on the condition that the dispatch target cluster has more ready goals than the dispatching cluster or on the condition that the dispatching cluster has fewer ready goals than the threshold brings the second lowest load-displacing rate limit and is expected to realize high performance stably at real program execution. More than 70% averaged utilization is achieved in the region that the load-displacing rate is higher than 5%. It is confirmed that 0.54 of the maximum performance of a parallel inference machine prototype can be achieved by applying this load-dispatching strategy.</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic programming</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Machine theory</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Parallel processing (Electronic computers)</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Sugie, M.</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report</subfield><subfield code="v">371</subfield><subfield code="w">(DE-604)BV010923438</subfield><subfield code="9">371</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-007318404</subfield></datafield></record></collection> |
id | DE-604.BV010943285 |
illustrated | Illustrated |
indexdate | 2024-07-09T18:01:26Z |
institution | BVB |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007318404 |
oclc_num | 21184171 |
open_access_boolean | |
owner | DE-91G DE-BY-TUM |
owner_facet | DE-91G DE-BY-TUM |
physical | 15 S. graph. Darst. |
publishDate | 1988 |
publishDateSearch | 1988 |
publishDateSort | 1988 |
record_format | marc |
series | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |
series2 | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |
spelling | Load-dispatching strategy on parallel inference machine M. Sugie ... Tokyo, Japan 1988 15 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report 371 Abstract: "Load-dispatching strategies are proposed for a parallel inference machine prototype, and their performance are evaluated by the simulation based on the loosely-coupled cluster model, using 6-queens benchmark. Sender-initiate concept is appropriate to the bunch layer of a parallel inference machine prototype. The strategy in which the cluster with maximum ready goals dispatches a goal to the cluster with minimum ready goals brings the lowest load-dispatching rate limit, but it is not expected to realize stable performance at real program execution, since it covers too narrow load-dispatching rate region The strategy in which the goal dispatch target cluster is determined at random and then this goal dispatch is aborted on the condition that the dispatch target cluster has more ready goals than the dispatching cluster or on the condition that the dispatching cluster has fewer ready goals than the threshold brings the second lowest load-displacing rate limit and is expected to realize high performance stably at real program execution. More than 70% averaged utilization is achieved in the region that the load-displacing rate is higher than 5%. It is confirmed that 0.54 of the maximum performance of a parallel inference machine prototype can be achieved by applying this load-dispatching strategy. Logic programming Machine theory Parallel processing (Electronic computers) Sugie, M. Sonstige oth Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report 371 (DE-604)BV010923438 371 |
spellingShingle | Load-dispatching strategy on parallel inference machine Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report Logic programming Machine theory Parallel processing (Electronic computers) |
title | Load-dispatching strategy on parallel inference machine |
title_auth | Load-dispatching strategy on parallel inference machine |
title_exact_search | Load-dispatching strategy on parallel inference machine |
title_full | Load-dispatching strategy on parallel inference machine M. Sugie ... |
title_fullStr | Load-dispatching strategy on parallel inference machine M. Sugie ... |
title_full_unstemmed | Load-dispatching strategy on parallel inference machine M. Sugie ... |
title_short | Load-dispatching strategy on parallel inference machine |
title_sort | load dispatching strategy on parallel inference machine |
topic | Logic programming Machine theory Parallel processing (Electronic computers) |
topic_facet | Logic programming Machine theory Parallel processing (Electronic computers) |
volume_link | (DE-604)BV010923438 |
work_keys_str_mv | AT sugiem loaddispatchingstrategyonparallelinferencemachine |