Multi-style multi-grain parallelism exploitation on a massively parallel architecture:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Pisa
1990
|
| Schriftenreihe: | Università degli Studi <Pisa> / Dipartimento di Informatica: Technical report
1990,31 |
| Schlagworte: | |
| Beschreibung: | 23 S. |
Internformat
MARC
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| 100 | 1 | |a Danelutto, Marco |e Verfasser |4 aut | |
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| 700 | 1 | |a Vanneschi, Marco |e Verfasser |4 aut | |
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| 999 | |a oai:aleph.bib-bvb.de:BVB01-007248970 | ||
Datensatz im Suchindex
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|---|---|
| any_adam_object | |
| author | Danelutto, Marco Vanneschi, Marco |
| author_facet | Danelutto, Marco Vanneschi, Marco |
| author_role | aut aut |
| author_sort | Danelutto, Marco |
| author_variant | m d md m v mv |
| building | Verbundindex |
| bvnumber | BV010843731 |
| ctrlnum | (OCoLC)26861274 (DE-599)BVBBV010843731 |
| format | Book |
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| id | DE-604.BV010843731 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T17:59:52Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007248970 |
| oclc_num | 26861274 |
| open_access_boolean | |
| owner | DE-91G DE-BY-TUM |
| owner_facet | DE-91G DE-BY-TUM |
| physical | 23 S. |
| publishDate | 1990 |
| publishDateSearch | 1990 |
| publishDateSort | 1990 |
| record_format | marc |
| series2 | Università degli Studi <Pisa> / Dipartimento di Informatica: Technical report |
| spelling | Danelutto, Marco Verfasser aut Multi-style multi-grain parallelism exploitation on a massively parallel architecture Marco Danelutto ; Marco Vanneschi Pisa 1990 23 S. txt rdacontent n rdamedia nc rdacarrier Università degli Studi <Pisa> / Dipartimento di Informatica: Technical report 1990,31 Computer architecture Parallel processing (Electronic computers) Vanneschi, Marco Verfasser aut Dipartimento di Informatica: Technical report Università degli Studi <Pisa> 1990,31 (DE-604)BV010841375 1990,31 |
| spellingShingle | Danelutto, Marco Vanneschi, Marco Multi-style multi-grain parallelism exploitation on a massively parallel architecture Computer architecture Parallel processing (Electronic computers) |
| title | Multi-style multi-grain parallelism exploitation on a massively parallel architecture |
| title_auth | Multi-style multi-grain parallelism exploitation on a massively parallel architecture |
| title_exact_search | Multi-style multi-grain parallelism exploitation on a massively parallel architecture |
| title_full | Multi-style multi-grain parallelism exploitation on a massively parallel architecture Marco Danelutto ; Marco Vanneschi |
| title_fullStr | Multi-style multi-grain parallelism exploitation on a massively parallel architecture Marco Danelutto ; Marco Vanneschi |
| title_full_unstemmed | Multi-style multi-grain parallelism exploitation on a massively parallel architecture Marco Danelutto ; Marco Vanneschi |
| title_short | Multi-style multi-grain parallelism exploitation on a massively parallel architecture |
| title_sort | multi style multi grain parallelism exploitation on a massively parallel architecture |
| topic | Computer architecture Parallel processing (Electronic computers) |
| topic_facet | Computer architecture Parallel processing (Electronic computers) |
| volume_link | (DE-604)BV010841375 |
| work_keys_str_mv | AT daneluttomarco multistylemultigrainparallelismexploitationonamassivelyparallelarchitecture AT vanneschimarco multistylemultigrainparallelismexploitationonamassivelyparallelarchitecture |