Boolmap D: a Boolean approach to performance directed technology mapping for lut based FPGA designs
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Buch |
| Sprache: | German |
| Veröffentlicht: |
München
TUM, LRE
1995
|
| Schriftenreihe: | Technische Universität <München> / Lehrstuhl für Rechnergestütztes Entwerfen: Technischer Bericht
1995,6 |
| Beschreibung: | 18 Bl. graph. Darst. |
Internformat
MARC
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| 245 | 1 | 0 | |a Boolmap D |b a Boolean approach to performance directed technology mapping for lut based FPGA designs |c Christian Legl ; Bernd Wurth, and Klaus Eckl. Technische Universität München, Lehrstuhl für Rechnergestütztes Entwerfen |
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| 490 | 1 | |a Technische Universität <München> / Lehrstuhl für Rechnergestütztes Entwerfen: Technischer Bericht |v 1995,6 | |
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| 700 | 1 | |a Eckl, Klaus |e Verfasser |4 aut | |
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Datensatz im Suchindex
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| author | Legl, Christian Wurth, Bernd Eckl, Klaus |
| author_facet | Legl, Christian Wurth, Bernd Eckl, Klaus |
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| id | DE-604.BV010534543 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T17:54:38Z |
| institution | BVB |
| language | German |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007022011 |
| oclc_num | 75659512 |
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| physical | 18 Bl. graph. Darst. |
| publishDate | 1995 |
| publishDateSearch | 1995 |
| publishDateSort | 1995 |
| publisher | TUM, LRE |
| record_format | marc |
| series2 | Technische Universität <München> / Lehrstuhl für Rechnergestütztes Entwerfen: Technischer Bericht |
| spelling | Legl, Christian Verfasser aut Boolmap D a Boolean approach to performance directed technology mapping for lut based FPGA designs Christian Legl ; Bernd Wurth, and Klaus Eckl. Technische Universität München, Lehrstuhl für Rechnergestütztes Entwerfen München TUM, LRE 1995 18 Bl. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Technische Universität <München> / Lehrstuhl für Rechnergestütztes Entwerfen: Technischer Bericht 1995,6 Wurth, Bernd Verfasser aut Eckl, Klaus Verfasser aut Lehrstuhl für Rechnergestütztes Entwerfen: Technischer Bericht Technische Universität <München> 1995,6 (DE-604)BV006642364 1995,6 |
| spellingShingle | Legl, Christian Wurth, Bernd Eckl, Klaus Boolmap D a Boolean approach to performance directed technology mapping for lut based FPGA designs |
| title | Boolmap D a Boolean approach to performance directed technology mapping for lut based FPGA designs |
| title_auth | Boolmap D a Boolean approach to performance directed technology mapping for lut based FPGA designs |
| title_exact_search | Boolmap D a Boolean approach to performance directed technology mapping for lut based FPGA designs |
| title_full | Boolmap D a Boolean approach to performance directed technology mapping for lut based FPGA designs Christian Legl ; Bernd Wurth, and Klaus Eckl. Technische Universität München, Lehrstuhl für Rechnergestütztes Entwerfen |
| title_fullStr | Boolmap D a Boolean approach to performance directed technology mapping for lut based FPGA designs Christian Legl ; Bernd Wurth, and Klaus Eckl. Technische Universität München, Lehrstuhl für Rechnergestütztes Entwerfen |
| title_full_unstemmed | Boolmap D a Boolean approach to performance directed technology mapping for lut based FPGA designs Christian Legl ; Bernd Wurth, and Klaus Eckl. Technische Universität München, Lehrstuhl für Rechnergestütztes Entwerfen |
| title_short | Boolmap D |
| title_sort | boolmap d a boolean approach to performance directed technology mapping for lut based fpga designs |
| title_sub | a Boolean approach to performance directed technology mapping for lut based FPGA designs |
| volume_link | (DE-604)BV006642364 |
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