Digital design and synthesis with Verilog HDL:
Saved in:
| Format: | Book |
|---|---|
| Language: | English |
| Published: |
San Jose, CA
Automata Publ. Co.
1993
|
| Edition: | 2. print. |
| Series: | Design automation series
|
| Subjects: | |
| Physical Description: | XII, 375 S. graph. Darst. |
| ISBN: | 096274882X |
Staff View
MARC
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Record in the Search Index
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| dewey-full | 621.3819532 |
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| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
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| id | DE-604.BV010423198 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T17:52:16Z |
| institution | BVB |
| isbn | 096274882X |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-006944136 |
| oclc_num | 31094933 |
| open_access_boolean | |
| owner | DE-20 |
| owner_facet | DE-20 |
| physical | XII, 375 S. graph. Darst. |
| publishDate | 1993 |
| publishDateSearch | 1993 |
| publishDateSort | 1993 |
| publisher | Automata Publ. Co. |
| record_format | marc |
| series2 | Design automation series |
| spelling | Digital design and synthesis with Verilog HDL Eli Sternheim ... 2. print. San Jose, CA Automata Publ. Co. 1993 XII, 375 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Design automation series Datenverarbeitung Logic design Data processing Verilog (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd rswk-swf VERILOG (DE-588)4268385-3 s DE-604 Sternheim, Eli Sonstige oth |
| spellingShingle | Digital design and synthesis with Verilog HDL Datenverarbeitung Logic design Data processing Verilog (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd |
| subject_GND | (DE-588)4268385-3 |
| title | Digital design and synthesis with Verilog HDL |
| title_auth | Digital design and synthesis with Verilog HDL |
| title_exact_search | Digital design and synthesis with Verilog HDL |
| title_full | Digital design and synthesis with Verilog HDL Eli Sternheim ... |
| title_fullStr | Digital design and synthesis with Verilog HDL Eli Sternheim ... |
| title_full_unstemmed | Digital design and synthesis with Verilog HDL Eli Sternheim ... |
| title_short | Digital design and synthesis with Verilog HDL |
| title_sort | digital design and synthesis with verilog hdl |
| topic | Datenverarbeitung Logic design Data processing Verilog (Computer hardware description language) VERILOG (DE-588)4268385-3 gnd |
| topic_facet | Datenverarbeitung Logic design Data processing Verilog (Computer hardware description language) VERILOG |
| work_keys_str_mv | AT sternheimeli digitaldesignandsynthesiswithveriloghdl |