Formal verification of VIPER's ALU:

Abstract: "This research report describes the formal verification of an arithmetic logic unit of the VIPER microprocessor. VIPER is one of the first processors designed using formal methods. A formal model in HOL has been created which models the ALU at two levels: on the higher level, the ALU...

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Bibliographic Details
Main Author: Wong, Wai (Author)
Format: Book
Language:English
Published: Cambridge 1993
Series:Computer Laboratory <Cambridge>: Technical report 300
Subjects:
Summary:Abstract: "This research report describes the formal verification of an arithmetic logic unit of the VIPER microprocessor. VIPER is one of the first processors designed using formal methods. A formal model in HOL has been created which models the ALU at two levels: on the higher level, the ALU is specified as a function taking two 32-bit operands and returning a result; on the lower level, the ALU is implemented by a number of 4-bit slices which should takes [sic] the same operands and returns the same result. The ALU is capable of performing thirteen different operations. A formal proof of functional equivalence of these two levels has been completed successfully
The complete HOL text of the ALU formal model and details of the proof procedures are included in this report. It has demonstrated that the HOL system is powerful and efficient enough to perform formal verification of realistic hardware design.
Physical Description:78 S.

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