Formal specification and verification of microprocessor systems:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Cambridge
1988
|
| Schriftenreihe: | Computer Laboratory <Cambridge>: Technical report
147 |
| Schlagworte: | |
| Beschreibung: | 24 S. |
Internformat
MARC
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Datensatz im Suchindex
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| author | Joyce, Jeffrey J. |
| author_facet | Joyce, Jeffrey J. |
| author_role | aut |
| author_sort | Joyce, Jeffrey J. |
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| building | Verbundindex |
| bvnumber | BV010408652 |
| ctrlnum | (OCoLC)19642002 (DE-599)BVBBV010408652 |
| format | Book |
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| id | DE-604.BV010408652 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T17:52:00Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-006931737 |
| oclc_num | 19642002 |
| open_access_boolean | |
| physical | 24 S. |
| publishDate | 1988 |
| publishDateSearch | 1988 |
| publishDateSort | 1988 |
| record_format | marc |
| series | Computer Laboratory <Cambridge>: Technical report |
| series2 | Computer Laboratory <Cambridge>: Technical report |
| spelling | Joyce, Jeffrey J. Verfasser aut Formal specification and verification of microprocessor systems Cambridge 1988 24 S. txt rdacontent n rdamedia nc rdacarrier Computer Laboratory <Cambridge>: Technical report 147 Computer hardware sigle Computer architecture Integrated circuits Very large scale integration Microprocessors Computer Laboratory <Cambridge>: Technical report 147 (DE-604)BV004055605 147 |
| spellingShingle | Joyce, Jeffrey J. Formal specification and verification of microprocessor systems Computer Laboratory <Cambridge>: Technical report Computer hardware sigle Computer architecture Integrated circuits Very large scale integration Microprocessors |
| title | Formal specification and verification of microprocessor systems |
| title_auth | Formal specification and verification of microprocessor systems |
| title_exact_search | Formal specification and verification of microprocessor systems |
| title_full | Formal specification and verification of microprocessor systems |
| title_fullStr | Formal specification and verification of microprocessor systems |
| title_full_unstemmed | Formal specification and verification of microprocessor systems |
| title_short | Formal specification and verification of microprocessor systems |
| title_sort | formal specification and verification of microprocessor systems |
| topic | Computer hardware sigle Computer architecture Integrated circuits Very large scale integration Microprocessors |
| topic_facet | Computer hardware Computer architecture Integrated circuits Very large scale integration Microprocessors |
| volume_link | (DE-604)BV004055605 |
| work_keys_str_mv | AT joycejeffreyj formalspecificationandverificationofmicroprocessorsystems |