Formal specification and verification of asynchronous processes in higher-order logic:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Cambridge
1988
|
| Schriftenreihe: | Computer Laboratory <Cambridge>: Technical report
136 |
| Schlagworte: | |
| Beschreibung: | 45 S. |
Internformat
MARC
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Datensatz im Suchindex
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| author | Joyce, Jeffrey J. |
| author_facet | Joyce, Jeffrey J. |
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| id | DE-604.BV010408613 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T17:52:00Z |
| institution | BVB |
| language | English |
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| oclc_num | 20414535 |
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| physical | 45 S. |
| publishDate | 1988 |
| publishDateSearch | 1988 |
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| series | Computer Laboratory <Cambridge>: Technical report |
| series2 | Computer Laboratory <Cambridge>: Technical report |
| spelling | Joyce, Jeffrey J. Verfasser aut Formal specification and verification of asynchronous processes in higher-order logic Cambridge 1988 45 S. txt rdacontent n rdamedia nc rdacarrier Computer Laboratory <Cambridge>: Technical report 136 Circuits sigle Computer hardware sigle Computer interfaces Logic, Symbolic and mathematical Computer Laboratory <Cambridge>: Technical report 136 (DE-604)BV004055605 136 |
| spellingShingle | Joyce, Jeffrey J. Formal specification and verification of asynchronous processes in higher-order logic Computer Laboratory <Cambridge>: Technical report Circuits sigle Computer hardware sigle Computer interfaces Logic, Symbolic and mathematical |
| title | Formal specification and verification of asynchronous processes in higher-order logic |
| title_auth | Formal specification and verification of asynchronous processes in higher-order logic |
| title_exact_search | Formal specification and verification of asynchronous processes in higher-order logic |
| title_full | Formal specification and verification of asynchronous processes in higher-order logic |
| title_fullStr | Formal specification and verification of asynchronous processes in higher-order logic |
| title_full_unstemmed | Formal specification and verification of asynchronous processes in higher-order logic |
| title_short | Formal specification and verification of asynchronous processes in higher-order logic |
| title_sort | formal specification and verification of asynchronous processes in higher order logic |
| topic | Circuits sigle Computer hardware sigle Computer interfaces Logic, Symbolic and mathematical |
| topic_facet | Circuits Computer hardware Computer interfaces Logic, Symbolic and mathematical |
| volume_link | (DE-604)BV004055605 |
| work_keys_str_mv | AT joycejeffreyj formalspecificationandverificationofasynchronousprocessesinhigherorderlogic |