Reasoning about the function and timing of integrated circuits with Prolog and temporal logic:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Cambridge
1988
|
| Schriftenreihe: | Computer Laboratory <Cambridge>: Technical report
126 |
| Schlagworte: | |
| Beschreibung: | 45 S. |
Internformat
MARC
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| 245 | 1 | 0 | |a Reasoning about the function and timing of integrated circuits with Prolog and temporal logic |c by M. E. Leeser |
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Datensatz im Suchindex
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| any_adam_object | |
| author | Leeser, Miriam E. |
| author_facet | Leeser, Miriam E. |
| author_role | aut |
| author_sort | Leeser, Miriam E. |
| author_variant | m e l me mel |
| building | Verbundindex |
| bvnumber | BV010408545 |
| classification_tum | DAT 195f DAT 706f DAT 307f |
| ctrlnum | (OCoLC)18039174 (DE-599)BVBBV010408545 |
| discipline | Informatik |
| format | Book |
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| id | DE-604.BV010408545 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T17:52:00Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-006931646 |
| oclc_num | 18039174 |
| open_access_boolean | |
| physical | 45 S. |
| publishDate | 1988 |
| publishDateSearch | 1988 |
| publishDateSort | 1988 |
| record_format | marc |
| series | Computer Laboratory <Cambridge>: Technical report |
| series2 | Computer Laboratory <Cambridge>: Technical report |
| spelling | Leeser, Miriam E. Verfasser aut Reasoning about the function and timing of integrated circuits with Prolog and temporal logic by M. E. Leeser Cambridge 1988 45 S. txt rdacontent n rdamedia nc rdacarrier Computer Laboratory <Cambridge>: Technical report 126 Integrated circuits Design and construction Computer Laboratory <Cambridge>: Technical report 126 (DE-604)BV004055605 126 |
| spellingShingle | Leeser, Miriam E. Reasoning about the function and timing of integrated circuits with Prolog and temporal logic Computer Laboratory <Cambridge>: Technical report Integrated circuits Design and construction |
| title | Reasoning about the function and timing of integrated circuits with Prolog and temporal logic |
| title_auth | Reasoning about the function and timing of integrated circuits with Prolog and temporal logic |
| title_exact_search | Reasoning about the function and timing of integrated circuits with Prolog and temporal logic |
| title_full | Reasoning about the function and timing of integrated circuits with Prolog and temporal logic by M. E. Leeser |
| title_fullStr | Reasoning about the function and timing of integrated circuits with Prolog and temporal logic by M. E. Leeser |
| title_full_unstemmed | Reasoning about the function and timing of integrated circuits with Prolog and temporal logic by M. E. Leeser |
| title_short | Reasoning about the function and timing of integrated circuits with Prolog and temporal logic |
| title_sort | reasoning about the function and timing of integrated circuits with prolog and temporal logic |
| topic | Integrated circuits Design and construction |
| topic_facet | Integrated circuits Design and construction |
| volume_link | (DE-604)BV004055605 |
| work_keys_str_mv | AT leesermiriame reasoningaboutthefunctionandtimingofintegratedcircuitswithprologandtemporallogic |