A note on implementing combining networks:
Gespeichert in:
Hauptverfasser: | , |
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Format: | Buch |
Sprache: | Undetermined |
Veröffentlicht: |
Kaiserslautern
Univ. Kaiserslautern
1994
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Schriftenreihe: | Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht
1994,11 |
Beschreibung: | 9 Bl. graph. Darst. |
Internformat
MARC
LEADER | 00000nam a2200000 cb4500 | ||
---|---|---|---|
001 | BV010363386 | ||
003 | DE-604 | ||
005 | 00000000000000.0 | ||
007 | t | ||
008 | 950830s1994 d||| |||| 00||| und d | ||
035 | |a (OCoLC)634224236 | ||
035 | |a (DE-599)BVBBV010363386 | ||
040 | |a DE-604 |b ger |e rakddb | ||
041 | |a und | ||
049 | |a DE-91 | ||
100 | 1 | |a Keller, Jörg |e Verfasser |4 aut | |
245 | 1 | 0 | |a A note on implementing combining networks |c Jörg Keller ; Thomas Walle |
264 | 1 | |a Kaiserslautern |b Univ. Kaiserslautern |c 1994 | |
300 | |a 9 Bl. |b graph. Darst. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
490 | 1 | |a Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht |v 1994,11 | |
700 | 1 | |a Walle, Thomas |e Verfasser |4 aut | |
830 | 0 | |a Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht |v 1994,11 |w (DE-604)BV006185478 |9 1994,11 | |
999 | |a oai:aleph.bib-bvb.de:BVB01-006898384 |
Datensatz im Suchindex
_version_ | 1804124785966317568 |
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any_adam_object | |
author | Keller, Jörg Walle, Thomas |
author_facet | Keller, Jörg Walle, Thomas |
author_role | aut aut |
author_sort | Keller, Jörg |
author_variant | j k jk t w tw |
building | Verbundindex |
bvnumber | BV010363386 |
ctrlnum | (OCoLC)634224236 (DE-599)BVBBV010363386 |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01034nam a2200277 cb4500</leader><controlfield tag="001">BV010363386</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">950830s1994 d||| |||| 00||| und d</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)634224236</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV010363386</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1=" " ind2=" "><subfield code="a">und</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Keller, Jörg</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">A note on implementing combining networks</subfield><subfield code="c">Jörg Keller ; Thomas Walle</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Kaiserslautern</subfield><subfield code="b">Univ. Kaiserslautern</subfield><subfield code="c">1994</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">9 Bl.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht</subfield><subfield code="v">1994,11</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Walle, Thomas</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht</subfield><subfield code="v">1994,11</subfield><subfield code="w">(DE-604)BV006185478</subfield><subfield code="9">1994,11</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-006898384</subfield></datafield></record></collection> |
id | DE-604.BV010363386 |
illustrated | Illustrated |
indexdate | 2024-07-09T17:51:11Z |
institution | BVB |
language | Undetermined |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-006898384 |
oclc_num | 634224236 |
open_access_boolean | |
owner | DE-91 DE-BY-TUM |
owner_facet | DE-91 DE-BY-TUM |
physical | 9 Bl. graph. Darst. |
publishDate | 1994 |
publishDateSearch | 1994 |
publishDateSort | 1994 |
publisher | Univ. Kaiserslautern |
record_format | marc |
series | Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht |
series2 | Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht |
spelling | Keller, Jörg Verfasser aut A note on implementing combining networks Jörg Keller ; Thomas Walle Kaiserslautern Univ. Kaiserslautern 1994 9 Bl. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht 1994,11 Walle, Thomas Verfasser aut Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht 1994,11 (DE-604)BV006185478 1994,11 |
spellingShingle | Keller, Jörg Walle, Thomas A note on implementing combining networks Sonderforschungsbereich VLSI-Entwurfsmethoden und Parallelität <Saarbrücken; Kaiserslautern>: SFB-Bericht |
title | A note on implementing combining networks |
title_auth | A note on implementing combining networks |
title_exact_search | A note on implementing combining networks |
title_full | A note on implementing combining networks Jörg Keller ; Thomas Walle |
title_fullStr | A note on implementing combining networks Jörg Keller ; Thomas Walle |
title_full_unstemmed | A note on implementing combining networks Jörg Keller ; Thomas Walle |
title_short | A note on implementing combining networks |
title_sort | a note on implementing combining networks |
volume_link | (DE-604)BV006185478 |
work_keys_str_mv | AT kellerjorg anoteonimplementingcombiningnetworks AT wallethomas anoteonimplementingcombiningnetworks |