IFIP Workshop on Logic and Architecture Synthesis: December 6 - 7 - 8, 1993, Institut National Polytechnique de Grenoble, France
Gespeichert in:
Körperschaft: | |
---|---|
Format: | Tagungsbericht Buch |
Sprache: | English |
Veröffentlicht: |
Grenoble
1993
|
Schlagworte: | |
Beschreibung: | 438 S. |
Internformat
MARC
LEADER | 00000nam a2200000 c 4500 | ||
---|---|---|---|
001 | BV010355092 | ||
003 | DE-604 | ||
005 | 19951107 | ||
007 | t | ||
008 | 950824s1993 |||| 10||| eng d | ||
035 | |a (OCoLC)53547957 | ||
035 | |a (DE-599)BVBBV010355092 | ||
040 | |a DE-604 |b ger |e rakddb | ||
041 | 0 | |a eng | |
049 | |a DE-91 | ||
084 | |a ELT 273f |2 stub | ||
111 | 2 | |a Workshop on Logic and Architecture Synthesis |d 1993 |c Grenoble |j Verfasser |0 (DE-588)1402317-9 |4 aut | |
245 | 1 | 0 | |a IFIP Workshop on Logic and Architecture Synthesis |b December 6 - 7 - 8, 1993, Institut National Polytechnique de Grenoble, France |
264 | 1 | |a Grenoble |c 1993 | |
300 | |a 438 S. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
650 | 4 | |a Circuits intégrés à très grande échelle - Conception et construction - Congrès | |
650 | 4 | |a Compilateurs de silicium - Conception et construction - Congrès | |
655 | 7 | |0 (DE-588)1071861417 |a Konferenzschrift |2 gnd-content | |
999 | |a oai:aleph.bib-bvb.de:BVB01-006893931 |
Datensatz im Suchindex
_version_ | 1804124778850680832 |
---|---|
any_adam_object | |
author_corporate | Workshop on Logic and Architecture Synthesis Grenoble |
author_corporate_role | aut |
author_facet | Workshop on Logic and Architecture Synthesis Grenoble |
author_sort | Workshop on Logic and Architecture Synthesis Grenoble |
building | Verbundindex |
bvnumber | BV010355092 |
classification_tum | ELT 273f |
ctrlnum | (OCoLC)53547957 (DE-599)BVBBV010355092 |
discipline | Elektrotechnik |
format | Conference Proceeding Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01048nam a2200289 c 4500</leader><controlfield tag="001">BV010355092</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">19951107 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">950824s1993 |||| 10||| eng d</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)53547957</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV010355092</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ELT 273f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="111" ind1="2" ind2=" "><subfield code="a">Workshop on Logic and Architecture Synthesis</subfield><subfield code="d">1993</subfield><subfield code="c">Grenoble</subfield><subfield code="j">Verfasser</subfield><subfield code="0">(DE-588)1402317-9</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">IFIP Workshop on Logic and Architecture Synthesis</subfield><subfield code="b">December 6 - 7 - 8, 1993, Institut National Polytechnique de Grenoble, France</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Grenoble</subfield><subfield code="c">1993</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">438 S.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits intégrés à très grande échelle - Conception et construction - Congrès</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Compilateurs de silicium - Conception et construction - Congrès</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="0">(DE-588)1071861417</subfield><subfield code="a">Konferenzschrift</subfield><subfield code="2">gnd-content</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-006893931</subfield></datafield></record></collection> |
genre | (DE-588)1071861417 Konferenzschrift gnd-content |
genre_facet | Konferenzschrift |
id | DE-604.BV010355092 |
illustrated | Not Illustrated |
indexdate | 2024-07-09T17:51:05Z |
institution | BVB |
institution_GND | (DE-588)1402317-9 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-006893931 |
oclc_num | 53547957 |
open_access_boolean | |
owner | DE-91 DE-BY-TUM |
owner_facet | DE-91 DE-BY-TUM |
physical | 438 S. |
publishDate | 1993 |
publishDateSearch | 1993 |
publishDateSort | 1993 |
record_format | marc |
spelling | Workshop on Logic and Architecture Synthesis 1993 Grenoble Verfasser (DE-588)1402317-9 aut IFIP Workshop on Logic and Architecture Synthesis December 6 - 7 - 8, 1993, Institut National Polytechnique de Grenoble, France Grenoble 1993 438 S. txt rdacontent n rdamedia nc rdacarrier Circuits intégrés à très grande échelle - Conception et construction - Congrès Compilateurs de silicium - Conception et construction - Congrès (DE-588)1071861417 Konferenzschrift gnd-content |
spellingShingle | IFIP Workshop on Logic and Architecture Synthesis December 6 - 7 - 8, 1993, Institut National Polytechnique de Grenoble, France Circuits intégrés à très grande échelle - Conception et construction - Congrès Compilateurs de silicium - Conception et construction - Congrès |
subject_GND | (DE-588)1071861417 |
title | IFIP Workshop on Logic and Architecture Synthesis December 6 - 7 - 8, 1993, Institut National Polytechnique de Grenoble, France |
title_auth | IFIP Workshop on Logic and Architecture Synthesis December 6 - 7 - 8, 1993, Institut National Polytechnique de Grenoble, France |
title_exact_search | IFIP Workshop on Logic and Architecture Synthesis December 6 - 7 - 8, 1993, Institut National Polytechnique de Grenoble, France |
title_full | IFIP Workshop on Logic and Architecture Synthesis December 6 - 7 - 8, 1993, Institut National Polytechnique de Grenoble, France |
title_fullStr | IFIP Workshop on Logic and Architecture Synthesis December 6 - 7 - 8, 1993, Institut National Polytechnique de Grenoble, France |
title_full_unstemmed | IFIP Workshop on Logic and Architecture Synthesis December 6 - 7 - 8, 1993, Institut National Polytechnique de Grenoble, France |
title_short | IFIP Workshop on Logic and Architecture Synthesis |
title_sort | ifip workshop on logic and architecture synthesis december 6 7 8 1993 institut national polytechnique de grenoble france |
title_sub | December 6 - 7 - 8, 1993, Institut National Polytechnique de Grenoble, France |
topic | Circuits intégrés à très grande échelle - Conception et construction - Congrès Compilateurs de silicium - Conception et construction - Congrès |
topic_facet | Circuits intégrés à très grande échelle - Conception et construction - Congrès Compilateurs de silicium - Conception et construction - Congrès Konferenzschrift |
work_keys_str_mv | AT workshoponlogicandarchitecturesynthesisgrenoble ifipworkshoponlogicandarchitecturesynthesisdecember6781993institutnationalpolytechniquedegrenoblefrance |