Exploitation of fine grain parallelism:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Berlin u.a.
Springer
1995
|
| Schriftenreihe: | Lecture notes in computer science
942 |
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | IX, 188 S. graph. Darst. |
| ISBN: | 354060054X 038760054X |
Internformat
MARC
| LEADER | 00000nam a2200000 cb4500 | ||
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| 001 | BV010229455 | ||
| 003 | DE-604 | ||
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| 007 | t| | ||
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| 100 | 1 | |a Böckle, Günter |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Exploitation of fine grain parallelism |c Günter Böckle |
| 264 | 1 | |a Berlin u.a. |b Springer |c 1995 | |
| 300 | |a IX, 188 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 1 | |a Lecture notes in computer science |v 942 | |
| 650 | 7 | |a Architecture des ordinateurs |2 ram | |
| 650 | 7 | |a Ordinateurs - Architecture |2 ram | |
| 650 | 7 | |a Parallelle verwerking |2 gtt | |
| 650 | 4 | |a Parallélisme (Informatique) | |
| 650 | 7 | |a Parallélisme (informatique) |2 ram | |
| 650 | 7 | |a Processamento eletronico de dados |2 larpcal | |
| 650 | 7 | |a VLIW |2 inriac | |
| 650 | 7 | |a architecture VLIW |2 inriac | |
| 650 | 7 | |a architecture parallèle |2 inriac | |
| 650 | 7 | |a ordonnancement |2 inriac | |
| 650 | 7 | |a parallélisme à grain fin |2 inriac | |
| 650 | 4 | |a Parallel processing (Electronic computers) | |
| 650 | 0 | 7 | |a Computerarchitektur |0 (DE-588)4048717-9 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Parallelverarbeitung |0 (DE-588)4075860-6 |2 gnd |9 rswk-swf |
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| 943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-006799857 | |
Datensatz im Suchindex
| _version_ | 1820874846619303936 |
|---|---|
| adam_text |
TABLE
OF
CONTENTS
1
INTRODUCTION
1
2
KINDS
OF
PARALLELISM
3
2.1
CLASSIFICATION
BY
STRUCTURAL
ITEMS
.
4
22
CLASSIFICATION
BY
ITEMS
PROCESSED
.
.
.
5
2.3
CLASSIFICATION
BY
INSTRUCTION
AND
DATA
STREAM
PARALLELISM
.
6
2.4
CLASSIFICATION
BY
MEMORY
ORGANIZATION
.
7
3
ARCHITECTURES
FOR
FINE-GRAIN
PARALLELISM
8
3.1
VERTICAL
PARALLELISM
.
8
32
HORIZONTAL
PARALLELISM
.
9
3.2.1
VLIW
ARCHITECTURE
.
9
3.2.2
SUPERSCALAR
PROCESSOR
ARCHITECTURES
.
11
3.3
CLASSIFICATION
OF
PIPELINED
PROCESSOR
ARCHITECTURES
.
12
3.4
OTHER
ARCHITECTURES
FOR
FINE-GRAIN
PARALLELISM
.
15
3.4.1
CONDITIONAL
EXECUTION
.
16
3.4.2
HISTORY
.
17
4
VLIW
MACHINES
18
4.1
MULTIFLOW
TRACE
.
18
4.2
IBM
'
S
VLIW
PROCESSOR
.
19
4.3
CYDRA
.
22
4.4
LIFE
(PHILIPS/SIGNETICS)
.
24
4.5
THE
XIMD
ARCHITECTURE
.
26
5
CONSTRAINTS
ON
VLIW
ARCHITECTURES
28
6
ARCHITECTURAL
SUPPORT
FOR
EXPLOITATION
OF
FINE-GRAIN
PARALLELISM
32
6.1
DYNAMIC
INSTRUCTION-SCHEDULING
.
32
7
CONSTRAINTS
FOR
INSTRUCTION
SCHEDULING
38
7.1
DATA
DEPENDENCES
.
38
7.2
OFF-LIVE
DEPENDENCE
.
38
8
INSTRUCTION-SCHEDULING
METHODS
40
8.1
LOCAL
INSTRUCTION-SCHEDULING
.
42
VIII
TABLE
OF
CONTENTS
8.2 GLOBAL
INSTRUCTION-SCHEDULING
.
42
8.3
GLOBAL
SCHEDULING
METHODS
BASED
ON
LOCAL
SCHEDULING
.
43
8.3.1
TRACE
SCHEDULING
.
43
8.3.2
OTHER
GLOBAL
SCHEDULING
METHODS
.
46
8.4
GLOBAL
SCHEDULING
ON
THE
PROGRAM
GRAPH
.
47
8.4.1
PERCOLATION
SCHEDULING
.
49
8.4.1.1
MOVE_OP
.
50
8.4.1.2
MOVE_CJ
.
51
8.4.1.3
UNIFY
.
52
8.4.1.4
DELETE
.
53
8.4.2
EXTENSIONS
TO
PERCOLATION
SCHEDULING
.
54
8.5
LOOP
PARALLELIZATION
.
55
8.5.1
LOOP
UNROLLING
.
56
8.5.2
SOFTWARE
PIPELINING
.
58
8.5.3
PERFECT
PIPELINING
.
59
8.5.4
INTEGRATING
LOOP
PARALLELIZATION
AND
INSTRUCTION
SCHEDULING
.
61
9
DEVELOPING
INSTRUCTION-SCHEDULING
METHODS
62
10
TOOLS
FOR
INSTRUCTION
SCHEDULING
63
10.1
THE
C
COMPILER
.
64
11
THE
MACHINE
MODEL
65
12
THE
HORIZONTAL
INSTRUCTION-SCHEDULER
67
12.1
THE
INTERFACE
COMPILER
-
SCHEDULER
.
67
12.2
THE
SCHEDULER
'
S
FRONT-END
.
68
12.2.1
MAPPING
RTLS
TO
MACHINE
INSTRUCTIONS
.
70
12.2.2
FLOW
GRAPH,
POINTER
TARGETS
AND
CALL
GRAPH
.
74
12.2.3
REGISTERS
AND
REGISTER
RENAMING
.
75
12.2.4
MEMORY-ACCESS
ANALYSIS
.
81
12.2.5
DATA-DEPENDENCE
ANALYSIS
.
90
12.2.6
INSERTING
REPRESENTATIVES
FOR
MULTICYCLE
OPERATIONS
.
92
12.2.7
DATA-FLOW
ANALYSIS
.
96
12.2.8
STANDARD
OPTIMIZATIONS
.
101
12.3
THE
SCHEDULER
'
S
CENTRAL
PART
.
103
12.3.1
LOOP
PARALLELIZATION
.
104
12.3.2
PARTITIONING
THE
PROGRAM
GRAPH
INTO
REGIONS
.
104
12.3.3
EXTENDED
PERCOLATION
SCHEDULING
-
CERE
TRANSFORMATIONS
.
106
TABLE
OF
CONTENTS
IX
12.3.3.1
STANDARD
CORE
TRANSFORMATIONS
.
106
12.3.3.2
CORE
TRANSFORMATIONS
FOR
MULTICYCLE
OPERATIONS
.
110
12.3.4
EXTENDED
PERCOLATION
SCHEDULING
-
STRUCTURE
.
115
12.3.5
EXTENDED
PERCOLATION
SCHEDULING
-
CONTROL
TACTICS
.
117
12.3.5.1
NODE-ORIENTED
TACTICS
.
117
12.3.5.2
OPERATION-ORIENTED
TACTICS
.
120
12.3.5.3
WHICH
TACTICS
FOR
WHAT
APPLICATION?
.
121
12.3.5.4
CONTROL
TACTICS
FOR
SPECIFIC
CODE
PATTERNS
.
121
12.3.5.5
CONTROL
TACTICS
CONSIDERING
RESOURCES
.
123
12.3.6
EXTENDED
PERCOLATION
SCHEDULING
-
CONTROL
STRATEGIES
.
124
12.3.7
MOVING
OPERATIONS
OUT
OF
REGIONS
AND
FUNCTIONS
.
125
12.3.8
RESOURCE
MANAGEMENT
.
128
12.4
THE
SCHEDULER
'
S
BACK-END
.
129
12.4.1
REGISTER
ALLOCATION
.
129
12.4.2
INTERACTIONS
BETWEEN
REGISTER
ALLOCATION
AND
INSTRUCTION
SCHEDULING
.
134
12.4.3
RESCHEDULING
.
135
12.4.4
ASSIGNMENT
OF
OPERATIONS
TO
PES
.
137
12.4.5
INSTRUCTION-WORD
GENERATION
.
138
12.4.6
DEBUG
INFORMATION
.
140
13
RESOURCE
MANAGEMENT
142
13.1
MACHINE
DESCRIPTION
.
144
13.2
OPERATORS
AND
FUNCTIONS
FOR
RESOURCE
MANAGEMENT
.
146
13.3
RESOURCE
ALLOCATION
.
147
13.4
RESOURCE
ASSIGNMENT
.
148
13.4.1
ASSIGNMENT
OF
PROCESSING
ELEMENTS
.
148
13.4.2
ASSIGNMENT
OF
GENERAL
RESOURCES
.
152
14
EXCEPTIONS
156
15
VERTICAL
INSTRUCTION-SCHEDULING
158
15.1
VERTICAL
CORE
TRANSFORMATIONS
.
159
16
CONCLUSION
164
17
REFERENCES
165 |
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| id | DE-604.BV010229455 |
| illustrated | Illustrated |
| indexdate | 2025-01-10T15:06:14Z |
| institution | BVB |
| isbn | 354060054X 038760054X |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-006799857 |
| oclc_num | 246319967 |
| open_access_boolean | |
| owner | DE-384 DE-739 DE-91G DE-BY-TUM DE-19 DE-BY-UBM DE-20 DE-83 DE-11 DE-188 DE-706 |
| owner_facet | DE-384 DE-739 DE-91G DE-BY-TUM DE-19 DE-BY-UBM DE-20 DE-83 DE-11 DE-188 DE-706 |
| physical | IX, 188 S. graph. Darst. |
| publishDate | 1995 |
| publishDateSearch | 1995 |
| publishDateSort | 1995 |
| publisher | Springer |
| record_format | marc |
| series | Lecture notes in computer science |
| series2 | Lecture notes in computer science |
| spelling | Böckle, Günter Verfasser aut Exploitation of fine grain parallelism Günter Böckle Berlin u.a. Springer 1995 IX, 188 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Lecture notes in computer science 942 Architecture des ordinateurs ram Ordinateurs - Architecture ram Parallelle verwerking gtt Parallélisme (Informatique) Parallélisme (informatique) ram Processamento eletronico de dados larpcal VLIW inriac architecture VLIW inriac architecture parallèle inriac ordonnancement inriac parallélisme à grain fin inriac Parallel processing (Electronic computers) Computerarchitektur (DE-588)4048717-9 gnd rswk-swf Parallelverarbeitung (DE-588)4075860-6 gnd rswk-swf Parallelverarbeitung (DE-588)4075860-6 s Computerarchitektur (DE-588)4048717-9 s DE-604 Lecture notes in computer science 942 (DE-604)BV000000607 942 DNB Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=006799857&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Böckle, Günter Exploitation of fine grain parallelism Lecture notes in computer science Architecture des ordinateurs ram Ordinateurs - Architecture ram Parallelle verwerking gtt Parallélisme (Informatique) Parallélisme (informatique) ram Processamento eletronico de dados larpcal VLIW inriac architecture VLIW inriac architecture parallèle inriac ordonnancement inriac parallélisme à grain fin inriac Parallel processing (Electronic computers) Computerarchitektur (DE-588)4048717-9 gnd Parallelverarbeitung (DE-588)4075860-6 gnd |
| subject_GND | (DE-588)4048717-9 (DE-588)4075860-6 |
| title | Exploitation of fine grain parallelism |
| title_auth | Exploitation of fine grain parallelism |
| title_exact_search | Exploitation of fine grain parallelism |
| title_full | Exploitation of fine grain parallelism Günter Böckle |
| title_fullStr | Exploitation of fine grain parallelism Günter Böckle |
| title_full_unstemmed | Exploitation of fine grain parallelism Günter Böckle |
| title_short | Exploitation of fine grain parallelism |
| title_sort | exploitation of fine grain parallelism |
| topic | Architecture des ordinateurs ram Ordinateurs - Architecture ram Parallelle verwerking gtt Parallélisme (Informatique) Parallélisme (informatique) ram Processamento eletronico de dados larpcal VLIW inriac architecture VLIW inriac architecture parallèle inriac ordonnancement inriac parallélisme à grain fin inriac Parallel processing (Electronic computers) Computerarchitektur (DE-588)4048717-9 gnd Parallelverarbeitung (DE-588)4075860-6 gnd |
| topic_facet | Architecture des ordinateurs Ordinateurs - Architecture Parallelle verwerking Parallélisme (Informatique) Parallélisme (informatique) Processamento eletronico de dados VLIW architecture VLIW architecture parallèle ordonnancement parallélisme à grain fin Parallel processing (Electronic computers) Computerarchitektur Parallelverarbeitung |
| url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=006799857&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
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