A technique to design delay-insensitive VLSI circuits:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Amsterdam
1986
|
| Schriftenreihe: | Centrum voor Wiskunde en Informatica <Amsterdam> / Department of Computer Science: Report CS
86,22 |
| Schlagworte: | |
| Beschreibung: | 12 S. |
Internformat
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| 100 | 1 | |a Ebergen, Jo C. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a A technique to design delay-insensitive VLSI circuits |c J. C. Ebergen |
| 264 | 1 | |a Amsterdam |c 1986 | |
| 300 | |a 12 S. | ||
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| 650 | 4 | |a Electronic circuit design | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration | |
| 810 | 2 | |a Department of Computer Science: Report CS |t Centrum voor Wiskunde en Informatica <Amsterdam> |v 86,22 |w (DE-604)BV008928356 |9 86,22 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-006743825 | ||
Datensatz im Suchindex
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|---|---|
| any_adam_object | |
| author | Ebergen, Jo C. |
| author_facet | Ebergen, Jo C. |
| author_role | aut |
| author_sort | Ebergen, Jo C. |
| author_variant | j c e jc jce |
| building | Verbundindex |
| bvnumber | BV010152374 |
| ctrlnum | (OCoLC)15579740 (DE-599)BVBBV010152374 |
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| id | DE-604.BV010152374 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T17:47:25Z |
| institution | BVB |
| language | English |
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| oclc_num | 15579740 |
| open_access_boolean | |
| physical | 12 S. |
| publishDate | 1986 |
| publishDateSearch | 1986 |
| publishDateSort | 1986 |
| record_format | marc |
| series2 | Centrum voor Wiskunde en Informatica <Amsterdam> / Department of Computer Science: Report CS |
| spelling | Ebergen, Jo C. Verfasser aut A technique to design delay-insensitive VLSI circuits J. C. Ebergen Amsterdam 1986 12 S. txt rdacontent n rdamedia nc rdacarrier Centrum voor Wiskunde en Informatica <Amsterdam> / Department of Computer Science: Report CS 86,22 Electronic circuit design Integrated circuits Very large scale integration Department of Computer Science: Report CS Centrum voor Wiskunde en Informatica <Amsterdam> 86,22 (DE-604)BV008928356 86,22 |
| spellingShingle | Ebergen, Jo C. A technique to design delay-insensitive VLSI circuits Electronic circuit design Integrated circuits Very large scale integration |
| title | A technique to design delay-insensitive VLSI circuits |
| title_auth | A technique to design delay-insensitive VLSI circuits |
| title_exact_search | A technique to design delay-insensitive VLSI circuits |
| title_full | A technique to design delay-insensitive VLSI circuits J. C. Ebergen |
| title_fullStr | A technique to design delay-insensitive VLSI circuits J. C. Ebergen |
| title_full_unstemmed | A technique to design delay-insensitive VLSI circuits J. C. Ebergen |
| title_short | A technique to design delay-insensitive VLSI circuits |
| title_sort | a technique to design delay insensitive vlsi circuits |
| topic | Electronic circuit design Integrated circuits Very large scale integration |
| topic_facet | Electronic circuit design Integrated circuits Very large scale integration |
| volume_link | (DE-604)BV008928356 |
| work_keys_str_mv | AT ebergenjoc atechniquetodesigndelayinsensitivevlsicircuits |