Recent developments in systolic design:
Abstract: "A systolic array is a network of processors that are locally and regularly connected. This special-purpose computing paradigm supports the parallel implementation of iterative algorithms in a variety of areas, e.g., numerical analysis, signal or image processing and graph theory. The...
Gespeichert in:
Hauptverfasser: | , |
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Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Edinburgh
1991
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Schriftenreihe: | Laboratory for Foundations of Computer Science <Edinburgh>: LFCS report series
176 |
Schlagworte: | |
Zusammenfassung: | Abstract: "A systolic array is a network of processors that are locally and regularly connected. This special-purpose computing paradigm supports the parallel implementation of iterative algorithms in a variety of areas, e.g., numerical analysis, signal or image processing and graph theory. The special appeal of systolic arrays is that they can be derived mechanically by provably correct and (in a sense) optimal synthesis methods. These methods transform algorithmic descriptions that do not specify concurrency or communication -- usually functional or imperative programs -- into functions that distribute the program's operations over time and space This process is called systolic design. The distribution functions can then be refined further and translated into a description for fabrication of a VLSI chip or into a distributed program for execution on a programmable processor array. Systolic design has received a lot of attention in the past decade. This paper is an overview and bibliography of recent results and current issues in the mechanical synthesis of systolic arrays. |
Beschreibung: | 26 S. |
Internformat
MARC
LEADER | 00000nam a2200000 cb4500 | ||
---|---|---|---|
001 | BV009724564 | ||
003 | DE-604 | ||
005 | 19950327 | ||
007 | t | ||
008 | 940728s1991 |||| 00||| eng d | ||
035 | |a (OCoLC)25393592 | ||
035 | |a (DE-599)BVBBV009724564 | ||
040 | |a DE-604 |b ger |e rakddb | ||
041 | 0 | |a eng | |
100 | 1 | |a Lengauer, Christian |e Verfasser |4 aut | |
245 | 1 | 0 | |a Recent developments in systolic design |c by Christian Lengauer ; Jingling Xue |
264 | 1 | |a Edinburgh |c 1991 | |
300 | |a 26 S. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
490 | 1 | |a Laboratory for Foundations of Computer Science <Edinburgh>: LFCS report series |v 176 | |
520 | 3 | |a Abstract: "A systolic array is a network of processors that are locally and regularly connected. This special-purpose computing paradigm supports the parallel implementation of iterative algorithms in a variety of areas, e.g., numerical analysis, signal or image processing and graph theory. The special appeal of systolic arrays is that they can be derived mechanically by provably correct and (in a sense) optimal synthesis methods. These methods transform algorithmic descriptions that do not specify concurrency or communication -- usually functional or imperative programs -- into functions that distribute the program's operations over time and space | |
520 | 3 | |a This process is called systolic design. The distribution functions can then be refined further and translated into a description for fabrication of a VLSI chip or into a distributed program for execution on a programmable processor array. Systolic design has received a lot of attention in the past decade. This paper is an overview and bibliography of recent results and current issues in the mechanical synthesis of systolic arrays. | |
650 | 7 | |a Computer software |2 sigle | |
650 | 7 | |a Mathematics |2 sigle | |
650 | 4 | |a Mathematik | |
650 | 4 | |a Systolic array circuits | |
700 | 1 | |a Xue, Jingling |e Verfasser |4 aut | |
830 | 0 | |a Laboratory for Foundations of Computer Science <Edinburgh>: LFCS report series |v 176 |w (DE-604)BV008930032 |9 176 | |
999 | |a oai:aleph.bib-bvb.de:BVB01-006431986 |
Datensatz im Suchindex
_version_ | 1804124071842021376 |
---|---|
any_adam_object | |
author | Lengauer, Christian Xue, Jingling |
author_facet | Lengauer, Christian Xue, Jingling |
author_role | aut aut |
author_sort | Lengauer, Christian |
author_variant | c l cl j x jx |
building | Verbundindex |
bvnumber | BV009724564 |
ctrlnum | (OCoLC)25393592 (DE-599)BVBBV009724564 |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02174nam a2200337 cb4500</leader><controlfield tag="001">BV009724564</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">19950327 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">940728s1991 |||| 00||| eng d</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)25393592</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV009724564</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Lengauer, Christian</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Recent developments in systolic design</subfield><subfield code="c">by Christian Lengauer ; Jingling Xue</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Edinburgh</subfield><subfield code="c">1991</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">26 S.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">Laboratory for Foundations of Computer Science <Edinburgh>: LFCS report series</subfield><subfield code="v">176</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">Abstract: "A systolic array is a network of processors that are locally and regularly connected. This special-purpose computing paradigm supports the parallel implementation of iterative algorithms in a variety of areas, e.g., numerical analysis, signal or image processing and graph theory. The special appeal of systolic arrays is that they can be derived mechanically by provably correct and (in a sense) optimal synthesis methods. These methods transform algorithmic descriptions that do not specify concurrency or communication -- usually functional or imperative programs -- into functions that distribute the program's operations over time and space</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">This process is called systolic design. The distribution functions can then be refined further and translated into a description for fabrication of a VLSI chip or into a distributed program for execution on a programmable processor array. Systolic design has received a lot of attention in the past decade. This paper is an overview and bibliography of recent results and current issues in the mechanical synthesis of systolic arrays.</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Computer software</subfield><subfield code="2">sigle</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Mathematics</subfield><subfield code="2">sigle</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Mathematik</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Systolic array circuits</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Xue, Jingling</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">Laboratory for Foundations of Computer Science <Edinburgh>: LFCS report series</subfield><subfield code="v">176</subfield><subfield code="w">(DE-604)BV008930032</subfield><subfield code="9">176</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-006431986</subfield></datafield></record></collection> |
id | DE-604.BV009724564 |
illustrated | Not Illustrated |
indexdate | 2024-07-09T17:39:50Z |
institution | BVB |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-006431986 |
oclc_num | 25393592 |
open_access_boolean | |
physical | 26 S. |
publishDate | 1991 |
publishDateSearch | 1991 |
publishDateSort | 1991 |
record_format | marc |
series | Laboratory for Foundations of Computer Science <Edinburgh>: LFCS report series |
series2 | Laboratory for Foundations of Computer Science <Edinburgh>: LFCS report series |
spelling | Lengauer, Christian Verfasser aut Recent developments in systolic design by Christian Lengauer ; Jingling Xue Edinburgh 1991 26 S. txt rdacontent n rdamedia nc rdacarrier Laboratory for Foundations of Computer Science <Edinburgh>: LFCS report series 176 Abstract: "A systolic array is a network of processors that are locally and regularly connected. This special-purpose computing paradigm supports the parallel implementation of iterative algorithms in a variety of areas, e.g., numerical analysis, signal or image processing and graph theory. The special appeal of systolic arrays is that they can be derived mechanically by provably correct and (in a sense) optimal synthesis methods. These methods transform algorithmic descriptions that do not specify concurrency or communication -- usually functional or imperative programs -- into functions that distribute the program's operations over time and space This process is called systolic design. The distribution functions can then be refined further and translated into a description for fabrication of a VLSI chip or into a distributed program for execution on a programmable processor array. Systolic design has received a lot of attention in the past decade. This paper is an overview and bibliography of recent results and current issues in the mechanical synthesis of systolic arrays. Computer software sigle Mathematics sigle Mathematik Systolic array circuits Xue, Jingling Verfasser aut Laboratory for Foundations of Computer Science <Edinburgh>: LFCS report series 176 (DE-604)BV008930032 176 |
spellingShingle | Lengauer, Christian Xue, Jingling Recent developments in systolic design Laboratory for Foundations of Computer Science <Edinburgh>: LFCS report series Computer software sigle Mathematics sigle Mathematik Systolic array circuits |
title | Recent developments in systolic design |
title_auth | Recent developments in systolic design |
title_exact_search | Recent developments in systolic design |
title_full | Recent developments in systolic design by Christian Lengauer ; Jingling Xue |
title_fullStr | Recent developments in systolic design by Christian Lengauer ; Jingling Xue |
title_full_unstemmed | Recent developments in systolic design by Christian Lengauer ; Jingling Xue |
title_short | Recent developments in systolic design |
title_sort | recent developments in systolic design |
topic | Computer software sigle Mathematics sigle Mathematik Systolic array circuits |
topic_facet | Computer software Mathematics Mathematik Systolic array circuits |
volume_link | (DE-604)BV008930032 |
work_keys_str_mv | AT lengauerchristian recentdevelopmentsinsystolicdesign AT xuejingling recentdevelopmentsinsystolicdesign |