Integrated placement and routing for VLSI layout synthesis:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | Undetermined |
| Veröffentlicht: |
Berkeley, Calif.
Computer Science Division, (EECS)
1992
|
| Schlagworte: | |
| Beschreibung: | Zugl.: Berkeley, Calif., Univ., Diss., 1992 |
| Beschreibung: | VII, 96 S. graph. Darst. |
Internformat
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Datensatz im Suchindex
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| author | Tzeng, Ping-San |
| author_facet | Tzeng, Ping-San |
| author_role | aut |
| author_sort | Tzeng, Ping-San |
| author_variant | p s t pst |
| building | Verbundindex |
| bvnumber | BV009534148 |
| classification_tum | DAT 195f ELT 355f |
| ctrlnum | (OCoLC)633334507 (DE-599)BVBBV009534148 |
| discipline | Informatik Elektrotechnik |
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| genre | (DE-588)4113937-9 Hochschulschrift gnd-content |
| genre_facet | Hochschulschrift |
| id | DE-604.BV009534148 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T17:36:40Z |
| institution | BVB |
| language | Undetermined |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-006295928 |
| oclc_num | 633334507 |
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| physical | VII, 96 S. graph. Darst. |
| publishDate | 1992 |
| publishDateSearch | 1992 |
| publishDateSort | 1992 |
| publisher | Computer Science Division, (EECS) |
| record_format | marc |
| spelling | Tzeng, Ping-San Verfasser aut Integrated placement and routing for VLSI layout synthesis Ping-San Tzeng UBC CSD 92 689 Berkeley, Calif. Computer Science Division, (EECS) 1992 VII, 96 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Zugl.: Berkeley, Calif., Univ., Diss., 1992 (DE-588)4113937-9 Hochschulschrift gnd-content |
| spellingShingle | Tzeng, Ping-San Integrated placement and routing for VLSI layout synthesis |
| subject_GND | (DE-588)4113937-9 |
| title | Integrated placement and routing for VLSI layout synthesis |
| title_alt | UBC CSD 92 689 |
| title_auth | Integrated placement and routing for VLSI layout synthesis |
| title_exact_search | Integrated placement and routing for VLSI layout synthesis |
| title_full | Integrated placement and routing for VLSI layout synthesis Ping-San Tzeng |
| title_fullStr | Integrated placement and routing for VLSI layout synthesis Ping-San Tzeng |
| title_full_unstemmed | Integrated placement and routing for VLSI layout synthesis Ping-San Tzeng |
| title_short | Integrated placement and routing for VLSI layout synthesis |
| title_sort | integrated placement and routing for vlsi layout synthesis |
| topic_facet | Hochschulschrift |
| work_keys_str_mv | AT tzengpingsan integratedplacementandroutingforvlsilayoutsynthesis AT tzengpingsan ubccsd92689 |