VLSI algorithms and architectures: advanced concepts
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Los Alamitos, Calif. u.a.
IEEE Computer Soc. Press
1993
|
| Schlagworte: | |
| Beschreibung: | IX, 303 S. Ill., graph. Darst. |
| ISBN: | 0818644028 |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV009198361 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | t | ||
| 008 | 940317s1993 ad|| |||| 00||| engod | ||
| 020 | |a 0818644028 |9 0-8186-4402-8 | ||
| 035 | |a (OCoLC)28181943 | ||
| 035 | |a (DE-599)BVBBV009198361 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-91 |a DE-91G |a DE-739 | ||
| 050 | 0 | |a TK7874 | |
| 082 | 0 | |a 621.39/5 |2 20 | |
| 084 | |a ST 190 |0 (DE-625)143607: |2 rvk | ||
| 084 | |a ELT 272f |2 stub | ||
| 100 | 1 | |a Ranganathan, N. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a VLSI algorithms and architectures |b advanced concepts |c N. Ranganathan |
| 264 | 1 | |a Los Alamitos, Calif. u.a. |b IEEE Computer Soc. Press |c 1993 | |
| 300 | |a IX, 303 S. |b Ill., graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 7 | |a Algorithmes |2 ram | |
| 650 | 7 | |a Architecture des ordinateurs |2 ram | |
| 650 | 4 | |a Computer algorithms | |
| 650 | 4 | |a Computer architecture | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Design and construction | |
| 650 | 0 | 7 | |a Entwurf |0 (DE-588)4121208-3 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 0 | 1 | |a Entwurf |0 (DE-588)4121208-3 |D s |
| 689 | 0 | |5 DE-604 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-006111268 | ||
Datensatz im Suchindex
| _version_ | 1804123635840974848 |
|---|---|
| any_adam_object | |
| author | Ranganathan, N. |
| author_facet | Ranganathan, N. |
| author_role | aut |
| author_sort | Ranganathan, N. |
| author_variant | n r nr |
| building | Verbundindex |
| bvnumber | BV009198361 |
| callnumber-first | T - Technology |
| callnumber-label | TK7874 |
| callnumber-raw | TK7874 |
| callnumber-search | TK7874 |
| callnumber-sort | TK 47874 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 190 |
| classification_tum | ELT 272f |
| ctrlnum | (OCoLC)28181943 (DE-599)BVBBV009198361 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01372nam a2200421 c 4500</leader><controlfield tag="001">BV009198361</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">940317s1993 ad|| |||| 00||| engod</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0818644028</subfield><subfield code="9">0-8186-4402-8</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)28181943</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV009198361</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91</subfield><subfield code="a">DE-91G</subfield><subfield code="a">DE-739</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7874</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.39/5</subfield><subfield code="2">20</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 190</subfield><subfield code="0">(DE-625)143607:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ELT 272f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Ranganathan, N.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">VLSI algorithms and architectures</subfield><subfield code="b">advanced concepts</subfield><subfield code="c">N. Ranganathan</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Los Alamitos, Calif. u.a.</subfield><subfield code="b">IEEE Computer Soc. Press</subfield><subfield code="c">1993</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">IX, 303 S.</subfield><subfield code="b">Ill., graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Algorithmes</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Architecture des ordinateurs</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer algorithms</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer architecture</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Very large scale integration</subfield><subfield code="x">Design and construction</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-006111268</subfield></datafield></record></collection> |
| id | DE-604.BV009198361 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T17:32:55Z |
| institution | BVB |
| isbn | 0818644028 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-006111268 |
| oclc_num | 28181943 |
| open_access_boolean | |
| owner | DE-91 DE-BY-TUM DE-91G DE-BY-TUM DE-739 |
| owner_facet | DE-91 DE-BY-TUM DE-91G DE-BY-TUM DE-739 |
| physical | IX, 303 S. Ill., graph. Darst. |
| publishDate | 1993 |
| publishDateSearch | 1993 |
| publishDateSort | 1993 |
| publisher | IEEE Computer Soc. Press |
| record_format | marc |
| spelling | Ranganathan, N. Verfasser aut VLSI algorithms and architectures advanced concepts N. Ranganathan Los Alamitos, Calif. u.a. IEEE Computer Soc. Press 1993 IX, 303 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Algorithmes ram Architecture des ordinateurs ram Computer algorithms Computer architecture Integrated circuits Very large scale integration Design and construction Entwurf (DE-588)4121208-3 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf VLSI (DE-588)4117388-0 s Entwurf (DE-588)4121208-3 s DE-604 |
| spellingShingle | Ranganathan, N. VLSI algorithms and architectures advanced concepts Algorithmes ram Architecture des ordinateurs ram Computer algorithms Computer architecture Integrated circuits Very large scale integration Design and construction Entwurf (DE-588)4121208-3 gnd VLSI (DE-588)4117388-0 gnd |
| subject_GND | (DE-588)4121208-3 (DE-588)4117388-0 |
| title | VLSI algorithms and architectures advanced concepts |
| title_auth | VLSI algorithms and architectures advanced concepts |
| title_exact_search | VLSI algorithms and architectures advanced concepts |
| title_full | VLSI algorithms and architectures advanced concepts N. Ranganathan |
| title_fullStr | VLSI algorithms and architectures advanced concepts N. Ranganathan |
| title_full_unstemmed | VLSI algorithms and architectures advanced concepts N. Ranganathan |
| title_short | VLSI algorithms and architectures |
| title_sort | vlsi algorithms and architectures advanced concepts |
| title_sub | advanced concepts |
| topic | Algorithmes ram Architecture des ordinateurs ram Computer algorithms Computer architecture Integrated circuits Very large scale integration Design and construction Entwurf (DE-588)4121208-3 gnd VLSI (DE-588)4117388-0 gnd |
| topic_facet | Algorithmes Architecture des ordinateurs Computer algorithms Computer architecture Integrated circuits Very large scale integration Design and construction Entwurf VLSI |
| work_keys_str_mv | AT ranganathann vlsialgorithmsandarchitecturesadvancedconcepts |