APA-Zitierstil (7. Ausg.)

(1983). Process and device simulation for MOS-VLSI circuits: [proceedings of the NATO Advanced Study Institute on Process and Device Simulation for MOS VLSI Circuits, SOGESTA, Urbino, Ialy, June 12 - 23, 1982]. Nijhoff.

Chicago-Zitierstil (17. Ausg.)

Process and Device Simulation for MOS-VLSI Circuits: [proceedings of the NATO Advanced Study Institute on Process and Device Simulation for MOS VLSI Circuits, SOGESTA, Urbino, Ialy, June 12 - 23, 1982]. Boston [u.a.]: Nijhoff, 1983.

MLA-Zitierstil (9. Ausg.)

Process and Device Simulation for MOS-VLSI Circuits: [proceedings of the NATO Advanced Study Institute on Process and Device Simulation for MOS VLSI Circuits, SOGESTA, Urbino, Ialy, June 12 - 23, 1982]. Nijhoff, 1983.

Achtung: Diese Zitate sind unter Umständen nicht zu 100% korrekt.