Introductory circuit analysis:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
New York
Wiley
1965
|
| Schlagworte: | |
| Beschreibung: | XV, 545 S. |
Internformat
MARC
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| 100 | 1 | |a Pearson, Sven I. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Introductory circuit analysis |c Sven I. Pearson ; George J. Maler* |
| 264 | 1 | |a New York |b Wiley |c 1965 | |
| 300 | |a XV, 545 S. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 4 | |a Circuits électriques | |
| 650 | 7 | |a Circuits électriques - Analyse |2 ram | |
| 650 | 4 | |a Electric circuits | |
| 650 | 0 | 7 | |a Analyse |0 (DE-588)4122795-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Logische Schaltung |0 (DE-588)4131023-8 |2 gnd |9 rswk-swf |
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| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Maler, George J. |e Verfasser |4 aut | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-005986511 | ||
Datensatz im Suchindex
| _version_ | 1804123401199026176 |
|---|---|
| any_adam_object | |
| author | Pearson, Sven I. Maler, George J. |
| author_facet | Pearson, Sven I. Maler, George J. |
| author_role | aut aut |
| author_sort | Pearson, Sven I. |
| author_variant | s i p si sip g j m gj gjm |
| building | Verbundindex |
| bvnumber | BV009045958 |
| callnumber-first | T - Technology |
| callnumber-label | TK3226 |
| callnumber-raw | TK3226 |
| callnumber-search | TK3226 |
| callnumber-sort | TK 43226 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| ctrlnum | (OCoLC)1455149 (DE-599)BVBBV009045958 |
| dewey-full | 621.31921 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.31921 |
| dewey-search | 621.31921 |
| dewey-sort | 3621.31921 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV009045958 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T17:29:11Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-005986511 |
| oclc_num | 1455149 |
| open_access_boolean | |
| owner | DE-29T DE-91 DE-BY-TUM |
| owner_facet | DE-29T DE-91 DE-BY-TUM |
| physical | XV, 545 S. |
| publishDate | 1965 |
| publishDateSearch | 1965 |
| publishDateSort | 1965 |
| publisher | Wiley |
| record_format | marc |
| spelling | Pearson, Sven I. Verfasser aut Introductory circuit analysis Sven I. Pearson ; George J. Maler* New York Wiley 1965 XV, 545 S. txt rdacontent n rdamedia nc rdacarrier Circuits électriques Circuits électriques - Analyse ram Electric circuits Analyse (DE-588)4122795-5 gnd rswk-swf Logische Schaltung (DE-588)4131023-8 gnd rswk-swf Logische Schaltung (DE-588)4131023-8 s Analyse (DE-588)4122795-5 s DE-604 Maler, George J. Verfasser aut |
| spellingShingle | Pearson, Sven I. Maler, George J. Introductory circuit analysis Circuits électriques Circuits électriques - Analyse ram Electric circuits Analyse (DE-588)4122795-5 gnd Logische Schaltung (DE-588)4131023-8 gnd |
| subject_GND | (DE-588)4122795-5 (DE-588)4131023-8 |
| title | Introductory circuit analysis |
| title_auth | Introductory circuit analysis |
| title_exact_search | Introductory circuit analysis |
| title_full | Introductory circuit analysis Sven I. Pearson ; George J. Maler* |
| title_fullStr | Introductory circuit analysis Sven I. Pearson ; George J. Maler* |
| title_full_unstemmed | Introductory circuit analysis Sven I. Pearson ; George J. Maler* |
| title_short | Introductory circuit analysis |
| title_sort | introductory circuit analysis |
| topic | Circuits électriques Circuits électriques - Analyse ram Electric circuits Analyse (DE-588)4122795-5 gnd Logische Schaltung (DE-588)4131023-8 gnd |
| topic_facet | Circuits électriques Circuits électriques - Analyse Electric circuits Analyse Logische Schaltung |
| work_keys_str_mv | AT pearsonsveni introductorycircuitanalysis AT malergeorgej introductorycircuitanalysis |