Reduction of network cost and wiring in Ranade's butterfly routing:
Abstract: "The class of n-input butterfly networks is very important for the design of scalable parallel machines because of constant node degree, depth log n and the existence of routing algorithms capable of delivering n log n packets, forming a log n-relation (log n packets destined to each...
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Amsterdam
1992
|
| Schriftenreihe: | Centrum voor Wiskunde en Informatica <Amsterdam> / Department of Computer Science: Report CS
92,43 |
| Schlagworte: | |
| Zusammenfassung: | Abstract: "The class of n-input butterfly networks is very important for the design of scalable parallel machines because of constant node degree, depth log n and the existence of routing algorithms capable of delivering n log n packets, forming a log n-relation (log n packets destined to each output), in time O(log n) with constant length buffers. Implementations however who ugly wiring. We present a method that, in comparison to the obvious implementation, reduces the number of chips and the number of links between chips in Ranade's butterfly routing by a factor of more than two. The chips remain connected as a butterfly network. This reduction in space simplifies cooling, power supply and allows for shorter links thus reducing wire delay." |
| Beschreibung: | 6 S. |
Internformat
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| 100 | 1 | |a Cross, David |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Reduction of network cost and wiring in Ranade's butterfly routing |c David Cross ; Reinhard Drefenstedt ; Jörg Keller |
| 264 | 1 | |a Amsterdam |c 1992 | |
| 300 | |a 6 S. | ||
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| 490 | 1 | |a Centrum voor Wiskunde en Informatica <Amsterdam> / Department of Computer Science: Report CS |v 92,43 | |
| 520 | 3 | |a Abstract: "The class of n-input butterfly networks is very important for the design of scalable parallel machines because of constant node degree, depth log n and the existence of routing algorithms capable of delivering n log n packets, forming a log n-relation (log n packets destined to each output), in time O(log n) with constant length buffers. Implementations however who ugly wiring. We present a method that, in comparison to the obvious implementation, reduces the number of chips and the number of links between chips in Ranade's butterfly routing by a factor of more than two. The chips remain connected as a butterfly network. This reduction in space simplifies cooling, power supply and allows for shorter links thus reducing wire delay." | |
| 650 | 4 | |a Computer architecture | |
| 650 | 4 | |a Packet switching (Data transmission) | |
| 700 | 1 | |a Drefenstedt, Reinhard |e Verfasser |4 aut | |
| 700 | 1 | |a Keller, Jörg |e Verfasser |4 aut | |
| 810 | 2 | |a Department of Computer Science: Report CS |t Centrum voor Wiskunde en Informatica <Amsterdam> |v 92,43 |w (DE-604)BV008928356 |9 92,43 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-005961360 | ||
Datensatz im Suchindex
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| author | Cross, David Drefenstedt, Reinhard Keller, Jörg |
| author_facet | Cross, David Drefenstedt, Reinhard Keller, Jörg |
| author_role | aut aut aut |
| author_sort | Cross, David |
| author_variant | d c dc r d rd j k jk |
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| bvnumber | BV009015830 |
| ctrlnum | (OCoLC)28982009 (DE-599)BVBBV009015830 |
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| id | DE-604.BV009015830 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T17:28:36Z |
| institution | BVB |
| language | English |
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| owner_facet | DE-29T |
| physical | 6 S. |
| publishDate | 1992 |
| publishDateSearch | 1992 |
| publishDateSort | 1992 |
| record_format | marc |
| series2 | Centrum voor Wiskunde en Informatica <Amsterdam> / Department of Computer Science: Report CS |
| spelling | Cross, David Verfasser aut Reduction of network cost and wiring in Ranade's butterfly routing David Cross ; Reinhard Drefenstedt ; Jörg Keller Amsterdam 1992 6 S. txt rdacontent n rdamedia nc rdacarrier Centrum voor Wiskunde en Informatica <Amsterdam> / Department of Computer Science: Report CS 92,43 Abstract: "The class of n-input butterfly networks is very important for the design of scalable parallel machines because of constant node degree, depth log n and the existence of routing algorithms capable of delivering n log n packets, forming a log n-relation (log n packets destined to each output), in time O(log n) with constant length buffers. Implementations however who ugly wiring. We present a method that, in comparison to the obvious implementation, reduces the number of chips and the number of links between chips in Ranade's butterfly routing by a factor of more than two. The chips remain connected as a butterfly network. This reduction in space simplifies cooling, power supply and allows for shorter links thus reducing wire delay." Computer architecture Packet switching (Data transmission) Drefenstedt, Reinhard Verfasser aut Keller, Jörg Verfasser aut Department of Computer Science: Report CS Centrum voor Wiskunde en Informatica <Amsterdam> 92,43 (DE-604)BV008928356 92,43 |
| spellingShingle | Cross, David Drefenstedt, Reinhard Keller, Jörg Reduction of network cost and wiring in Ranade's butterfly routing Computer architecture Packet switching (Data transmission) |
| title | Reduction of network cost and wiring in Ranade's butterfly routing |
| title_auth | Reduction of network cost and wiring in Ranade's butterfly routing |
| title_exact_search | Reduction of network cost and wiring in Ranade's butterfly routing |
| title_full | Reduction of network cost and wiring in Ranade's butterfly routing David Cross ; Reinhard Drefenstedt ; Jörg Keller |
| title_fullStr | Reduction of network cost and wiring in Ranade's butterfly routing David Cross ; Reinhard Drefenstedt ; Jörg Keller |
| title_full_unstemmed | Reduction of network cost and wiring in Ranade's butterfly routing David Cross ; Reinhard Drefenstedt ; Jörg Keller |
| title_short | Reduction of network cost and wiring in Ranade's butterfly routing |
| title_sort | reduction of network cost and wiring in ranade s butterfly routing |
| topic | Computer architecture Packet switching (Data transmission) |
| topic_facet | Computer architecture Packet switching (Data transmission) |
| volume_link | (DE-604)BV008928356 |
| work_keys_str_mv | AT crossdavid reductionofnetworkcostandwiringinranadesbutterflyrouting AT drefenstedtreinhard reductionofnetworkcostandwiringinranadesbutterflyrouting AT kellerjorg reductionofnetworkcostandwiringinranadesbutterflyrouting |