Performance evaluation of wire-limited hierarchical networks:

Abstract: "Advanced packaging technology demands a new approach to system design. In the study of multiprocessor networks, attention must be paid to the effects of packaging constraints on cost and performance, as well as the physical hierarchy imposed by packaging. We examine a simple bus-base...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Hsu, William T. (VerfasserIn), Yew, Pen-Chung (VerfasserIn)
Format: Buch
Sprache:English
Veröffentlicht: Urbana, Ill. 1992
Schriftenreihe:Center for Supercomputing Research and Development <Urbana, Ill.>: CSRD report 1179
Schlagworte:
Zusammenfassung:Abstract: "Advanced packaging technology demands a new approach to system design. In the study of multiprocessor networks, attention must be paid to the effects of packaging constraints on cost and performance, as well as the physical hierarchy imposed by packaging. We examine a simple bus-based approach to clustering, and analyze its effects on k-ary n-cubes such as meshes and hypercubes. We also study a generalized shuffle- exchange network, based on graphs with optimal diameter for a given degree, and hence attractive from the standpoint of pinout constraints. Relative performance is heavily dependent on the cost constraint used, the system configuration and message granularity. The choice of a multiprocessor interconnect must take into consideration all these factors."
Beschreibung:35 S.

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