Advanced simulation and test methodologies for VLSI design:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
London
Van Nostrand Reinhold
1989
|
| Ausgabe: | 1. published |
| Schlagworte: | |
| Beschreibung: | XI, 378 S.: graph. Darst. |
| ISBN: | 0747600015 |
Internformat
MARC
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| 245 | 1 | 0 | |a Advanced simulation and test methodologies for VLSI design |c Gordon Russel and Ian L. Sayers |
| 250 | |a 1. published | ||
| 264 | 1 | |a London |b Van Nostrand Reinhold |c 1989 | |
| 300 | |a XI, 378 S.: graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 7 | |a Circuits intégrés à très grande échelle - Conception et construction |2 ram | |
| 650 | 7 | |a Circuits intégrés à très grande échelle - Essais |2 ram | |
| 650 | 4 | |a Conception VLSI | |
| 650 | 4 | |a Simulation | |
| 650 | 7 | |a Simulation, Méthodes de |2 ram | |
| 650 | 4 | |a Test VLSI | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Design and construction |x Simulation methods | |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Prüftechnik |0 (DE-588)4047610-8 |2 gnd |9 rswk-swf |
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Datensatz im Suchindex
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|---|---|
| any_adam_object | |
| author | Russel, Gordon Sayers, Ian L. |
| author_facet | Russel, Gordon Sayers, Ian L. |
| author_role | aut aut |
| author_sort | Russel, Gordon |
| author_variant | g r gr i l s il ils |
| building | Verbundindex |
| bvnumber | BV008992941 |
| callnumber-first | T - Technology |
| callnumber-label | TK7874 |
| callnumber-raw | TK7874 |
| callnumber-search | TK7874 |
| callnumber-sort | TK 47874 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 190 |
| ctrlnum | (OCoLC)18324970 (DE-599)BVBBV008992941 |
| dewey-full | 621.381/73 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.381/73 |
| dewey-search | 621.381/73 |
| dewey-sort | 3621.381 273 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | 1. published |
| format | Book |
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| id | DE-604.BV008992941 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T17:28:08Z |
| institution | BVB |
| isbn | 0747600015 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-005941836 |
| oclc_num | 18324970 |
| open_access_boolean | |
| owner | DE-29T |
| owner_facet | DE-29T |
| physical | XI, 378 S.: graph. Darst. |
| publishDate | 1989 |
| publishDateSearch | 1989 |
| publishDateSort | 1989 |
| publisher | Van Nostrand Reinhold |
| record_format | marc |
| spelling | Russel, Gordon Verfasser aut Advanced simulation and test methodologies for VLSI design Gordon Russel and Ian L. Sayers 1. published London Van Nostrand Reinhold 1989 XI, 378 S.: graph. Darst. txt rdacontent n rdamedia nc rdacarrier Circuits intégrés à très grande échelle - Conception et construction ram Circuits intégrés à très grande échelle - Essais ram Conception VLSI Simulation Simulation, Méthodes de ram Test VLSI Integrated circuits Very large scale integration Design and construction Simulation methods VLSI (DE-588)4117388-0 gnd rswk-swf Prüftechnik (DE-588)4047610-8 gnd rswk-swf Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf VLSI (DE-588)4117388-0 s Schaltungsentwurf (DE-588)4179389-4 s DE-604 Prüftechnik (DE-588)4047610-8 s 1\p DE-604 Sayers, Ian L. Verfasser aut 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Russel, Gordon Sayers, Ian L. Advanced simulation and test methodologies for VLSI design Circuits intégrés à très grande échelle - Conception et construction ram Circuits intégrés à très grande échelle - Essais ram Conception VLSI Simulation Simulation, Méthodes de ram Test VLSI Integrated circuits Very large scale integration Design and construction Simulation methods VLSI (DE-588)4117388-0 gnd Prüftechnik (DE-588)4047610-8 gnd Schaltungsentwurf (DE-588)4179389-4 gnd |
| subject_GND | (DE-588)4117388-0 (DE-588)4047610-8 (DE-588)4179389-4 |
| title | Advanced simulation and test methodologies for VLSI design |
| title_auth | Advanced simulation and test methodologies for VLSI design |
| title_exact_search | Advanced simulation and test methodologies for VLSI design |
| title_full | Advanced simulation and test methodologies for VLSI design Gordon Russel and Ian L. Sayers |
| title_fullStr | Advanced simulation and test methodologies for VLSI design Gordon Russel and Ian L. Sayers |
| title_full_unstemmed | Advanced simulation and test methodologies for VLSI design Gordon Russel and Ian L. Sayers |
| title_short | Advanced simulation and test methodologies for VLSI design |
| title_sort | advanced simulation and test methodologies for vlsi design |
| topic | Circuits intégrés à très grande échelle - Conception et construction ram Circuits intégrés à très grande échelle - Essais ram Conception VLSI Simulation Simulation, Méthodes de ram Test VLSI Integrated circuits Very large scale integration Design and construction Simulation methods VLSI (DE-588)4117388-0 gnd Prüftechnik (DE-588)4047610-8 gnd Schaltungsentwurf (DE-588)4179389-4 gnd |
| topic_facet | Circuits intégrés à très grande échelle - Conception et construction Circuits intégrés à très grande échelle - Essais Conception VLSI Simulation Simulation, Méthodes de Test VLSI Integrated circuits Very large scale integration Design and construction Simulation methods VLSI Prüftechnik Schaltungsentwurf |
| work_keys_str_mv | AT russelgordon advancedsimulationandtestmethodologiesforvlsidesign AT sayersianl advancedsimulationandtestmethodologiesforvlsidesign |