Abstract: "Circuit simulation has become an indispensable tool in the design of very large scale integrated circuits (VLSI). However, as integrated circuit technology progresses, existing programs such as SPICE require increasingly large amounts of time to simulate the circuit being designed. R...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	Hung, Gih-Guang (VerfasserIn)
Format:	Buch
Sprache:	English
Veröffentlicht:	Urbana, Ill. 1991
Schriftenreihe:	Center for Supercomputing Research and Development <Urbana, Ill,>: CSRD report 1126
Schlagworte:	Integrated circuits > Very large scale integration Performance Simulation methods Hochschulschrift
Zusammenfassung:	Abstract: "Circuit simulation has become an indispensable tool in the design of very large scale integrated circuits (VLSI). However, as integrated circuit technology progresses, existing programs such as SPICE require increasingly large amounts of time to simulate the circuit being designed. Remedies for this problem were observed in the development of relaxation-based algorithms such as Iterated Timing Analysis (ITA) and waveform relaxation (WR). Even these techniques, by themselves, cannot keep up with the complexity of VLSI circuits. The main objective of this thesis is to explore the use of parallel processing techniques in relaxation-based circuit simulation algorithms, with the goal of minimizing the simulation time as much as possible Particular emphasis will be on parallel variants of the Iterated Timing Analysis algorithm. Detailed performance analysis and follow-up enhancements are presented. The event-driven ITA approach is shown to be the best algorithm based on the research described here and the collection of benchmark circuits used. Speedups as high as 6 were obtained on eight processors using this approach.
Beschreibung:	Zugl.: Urbana, Ill., Univ., Diss.
Beschreibung:	VIII, 40 S.