Compiler-directed data prefetching in multiprocessors with memory hierarchies:
Abstract: "Memory heirarchies are used by multiprocessor systems to reduce large memory access times. It is necessary to automatically manage such a hierarchy, to obtain effective memory utilization. In this paper, we discuss the various issues involved in obtaining an optimal memory management...
Gespeichert in:
Hauptverfasser: | , , |
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Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Urbana, Ill.
1990
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Schriftenreihe: | Center for Supercomputing Research and Development <Urbana, Ill.>: CSRD report
996 |
Schlagworte: | |
Zusammenfassung: | Abstract: "Memory heirarchies are used by multiprocessor systems to reduce large memory access times. It is necessary to automatically manage such a hierarchy, to obtain effective memory utilization. In this paper, we discuss the various issues involved in obtaining an optimal memory management strategy for a memory hierarchy. We present an algorithm for finding the earliest point in a program that a block of data can be prefetched. This determination is based on the control and the data dependences in the program. Such a method is an integral part of more general memory management algorithms We demonstrate our method's potential by using static analysis to estimate the performance improvement afforded by our prefetching strategy and to analyze the reference patterns in a set of Fortran benchmarks. We also study the effectiveness of prefetching in a realistic shared-memory system using an RTL-level simulator and real codes. This differs from previous studies by considering prefetching benefits in the presence of network contention. |
Beschreibung: | 15 S. |
Internformat
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100 | 1 | |a Gornish, Edward H. |e Verfasser |4 aut | |
245 | 1 | 0 | |a Compiler-directed data prefetching in multiprocessors with memory hierarchies |c Edard H. Gornish, Elana D. Granston, and Alexander V. Veidenbaum |
264 | 1 | |a Urbana, Ill. |c 1990 | |
300 | |a 15 S. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
490 | 1 | |a Center for Supercomputing Research and Development <Urbana, Ill.>: CSRD report |v 996 | |
520 | 3 | |a Abstract: "Memory heirarchies are used by multiprocessor systems to reduce large memory access times. It is necessary to automatically manage such a hierarchy, to obtain effective memory utilization. In this paper, we discuss the various issues involved in obtaining an optimal memory management strategy for a memory hierarchy. We present an algorithm for finding the earliest point in a program that a block of data can be prefetched. This determination is based on the control and the data dependences in the program. Such a method is an integral part of more general memory management algorithms | |
520 | 3 | |a We demonstrate our method's potential by using static analysis to estimate the performance improvement afforded by our prefetching strategy and to analyze the reference patterns in a set of Fortran benchmarks. We also study the effectiveness of prefetching in a realistic shared-memory system using an RTL-level simulator and real codes. This differs from previous studies by considering prefetching benefits in the presence of network contention. | |
650 | 4 | |a Computer storage devices | |
650 | 4 | |a Multiprocessors | |
700 | 1 | |a Granston, Elana D. |e Verfasser |4 aut | |
700 | 1 | |a Veidenbaum, Alexander V. |e Verfasser |4 aut | |
830 | 0 | |a Center for Supercomputing Research and Development <Urbana, Ill.>: CSRD report |v 996 |w (DE-604)BV008930033 |9 996 | |
999 | |a oai:aleph.bib-bvb.de:BVB01-005925536 |
Datensatz im Suchindex
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any_adam_object | |
author | Gornish, Edward H. Granston, Elana D. Veidenbaum, Alexander V. |
author_facet | Gornish, Edward H. Granston, Elana D. Veidenbaum, Alexander V. |
author_role | aut aut aut |
author_sort | Gornish, Edward H. |
author_variant | e h g eh ehg e d g ed edg a v v av avv |
building | Verbundindex |
bvnumber | BV008973884 |
ctrlnum | (OCoLC)24116781 (DE-599)BVBBV008973884 |
format | Book |
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id | DE-604.BV008973884 |
illustrated | Not Illustrated |
indexdate | 2024-07-09T17:27:46Z |
institution | BVB |
language | English |
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physical | 15 S. |
publishDate | 1990 |
publishDateSearch | 1990 |
publishDateSort | 1990 |
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series | Center for Supercomputing Research and Development <Urbana, Ill.>: CSRD report |
series2 | Center for Supercomputing Research and Development <Urbana, Ill.>: CSRD report |
spelling | Gornish, Edward H. Verfasser aut Compiler-directed data prefetching in multiprocessors with memory hierarchies Edard H. Gornish, Elana D. Granston, and Alexander V. Veidenbaum Urbana, Ill. 1990 15 S. txt rdacontent n rdamedia nc rdacarrier Center for Supercomputing Research and Development <Urbana, Ill.>: CSRD report 996 Abstract: "Memory heirarchies are used by multiprocessor systems to reduce large memory access times. It is necessary to automatically manage such a hierarchy, to obtain effective memory utilization. In this paper, we discuss the various issues involved in obtaining an optimal memory management strategy for a memory hierarchy. We present an algorithm for finding the earliest point in a program that a block of data can be prefetched. This determination is based on the control and the data dependences in the program. Such a method is an integral part of more general memory management algorithms We demonstrate our method's potential by using static analysis to estimate the performance improvement afforded by our prefetching strategy and to analyze the reference patterns in a set of Fortran benchmarks. We also study the effectiveness of prefetching in a realistic shared-memory system using an RTL-level simulator and real codes. This differs from previous studies by considering prefetching benefits in the presence of network contention. Computer storage devices Multiprocessors Granston, Elana D. Verfasser aut Veidenbaum, Alexander V. Verfasser aut Center for Supercomputing Research and Development <Urbana, Ill.>: CSRD report 996 (DE-604)BV008930033 996 |
spellingShingle | Gornish, Edward H. Granston, Elana D. Veidenbaum, Alexander V. Compiler-directed data prefetching in multiprocessors with memory hierarchies Center for Supercomputing Research and Development <Urbana, Ill.>: CSRD report Computer storage devices Multiprocessors |
title | Compiler-directed data prefetching in multiprocessors with memory hierarchies |
title_auth | Compiler-directed data prefetching in multiprocessors with memory hierarchies |
title_exact_search | Compiler-directed data prefetching in multiprocessors with memory hierarchies |
title_full | Compiler-directed data prefetching in multiprocessors with memory hierarchies Edard H. Gornish, Elana D. Granston, and Alexander V. Veidenbaum |
title_fullStr | Compiler-directed data prefetching in multiprocessors with memory hierarchies Edard H. Gornish, Elana D. Granston, and Alexander V. Veidenbaum |
title_full_unstemmed | Compiler-directed data prefetching in multiprocessors with memory hierarchies Edard H. Gornish, Elana D. Granston, and Alexander V. Veidenbaum |
title_short | Compiler-directed data prefetching in multiprocessors with memory hierarchies |
title_sort | compiler directed data prefetching in multiprocessors with memory hierarchies |
topic | Computer storage devices Multiprocessors |
topic_facet | Computer storage devices Multiprocessors |
volume_link | (DE-604)BV008930033 |
work_keys_str_mv | AT gornishedwardh compilerdirecteddataprefetchinginmultiprocessorswithmemoryhierarchies AT granstonelanad compilerdirecteddataprefetchinginmultiprocessorswithmemoryhierarchies AT veidenbaumalexanderv compilerdirecteddataprefetchinginmultiprocessorswithmemoryhierarchies |