Timing analysis of VLSI circuits using symbolic and visualization technics for practical applications:
Gespeichert in:
1. Verfasser: | |
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Format: | Buch |
Sprache: | English |
Veröffentlicht: |
1992
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Schlagworte: | |
Beschreibung: | Kopie, erschienen im Verl. Univ. Microfilms Internat., Ann Arbor, Mich. - College Station, Tex., Texas A&M Univ., Diss., 1992 |
Beschreibung: | XVII, 146 S. graph. Darst. |
Internformat
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650 | 4 | |a Integrated circuits |x Simulation methods | |
650 | 4 | |a Integrated circuits |x Very large scale integration |x Design | |
655 | 7 | |0 (DE-588)4113937-9 |a Hochschulschrift |2 gnd-content | |
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Datensatz im Suchindex
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any_adam_object | |
author | Shiau, Yan-Chyuan |
author_facet | Shiau, Yan-Chyuan |
author_role | aut |
author_sort | Shiau, Yan-Chyuan |
author_variant | y c s ycs |
building | Verbundindex |
bvnumber | BV008283456 |
classification_rvk | ST 190 |
ctrlnum | (OCoLC)27808221 (DE-599)BVBBV008283456 |
discipline | Informatik |
format | Book |
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genre | (DE-588)4113937-9 Hochschulschrift gnd-content |
genre_facet | Hochschulschrift |
id | DE-604.BV008283456 |
illustrated | Illustrated |
indexdate | 2024-07-09T17:17:44Z |
institution | BVB |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-005473375 |
oclc_num | 27808221 |
open_access_boolean | |
owner | DE-739 |
owner_facet | DE-739 |
physical | XVII, 146 S. graph. Darst. |
publishDate | 1992 |
publishDateSearch | 1992 |
publishDateSort | 1992 |
record_format | marc |
spelling | Shiau, Yan-Chyuan Verfasser aut Timing analysis of VLSI circuits using symbolic and visualization technics for practical applications by Yan-Chyuan Shiau 1992 XVII, 146 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Kopie, erschienen im Verl. Univ. Microfilms Internat., Ann Arbor, Mich. - College Station, Tex., Texas A&M Univ., Diss., 1992 Major electrical engineering Electric circuit analysis Integrated circuits Simulation methods Integrated circuits Very large scale integration Design (DE-588)4113937-9 Hochschulschrift gnd-content |
spellingShingle | Shiau, Yan-Chyuan Timing analysis of VLSI circuits using symbolic and visualization technics for practical applications Major electrical engineering Electric circuit analysis Integrated circuits Simulation methods Integrated circuits Very large scale integration Design |
subject_GND | (DE-588)4113937-9 |
title | Timing analysis of VLSI circuits using symbolic and visualization technics for practical applications |
title_auth | Timing analysis of VLSI circuits using symbolic and visualization technics for practical applications |
title_exact_search | Timing analysis of VLSI circuits using symbolic and visualization technics for practical applications |
title_full | Timing analysis of VLSI circuits using symbolic and visualization technics for practical applications by Yan-Chyuan Shiau |
title_fullStr | Timing analysis of VLSI circuits using symbolic and visualization technics for practical applications by Yan-Chyuan Shiau |
title_full_unstemmed | Timing analysis of VLSI circuits using symbolic and visualization technics for practical applications by Yan-Chyuan Shiau |
title_short | Timing analysis of VLSI circuits using symbolic and visualization technics for practical applications |
title_sort | timing analysis of vlsi circuits using symbolic and visualization technics for practical applications |
topic | Major electrical engineering Electric circuit analysis Integrated circuits Simulation methods Integrated circuits Very large scale integration Design |
topic_facet | Major electrical engineering Electric circuit analysis Integrated circuits Simulation methods Integrated circuits Very large scale integration Design Hochschulschrift |
work_keys_str_mv | AT shiauyanchyuan timinganalysisofvlsicircuitsusingsymbolicandvisualizationtechnicsforpracticalapplications |