Algorithms for synthesis and testing of asynchronous circuits:
The design of asynchronous circuits is increasingly important in solving problems such as complexity management, modularity, power consumption and clock distribution in large digital integrated circuits
Gespeichert in:
Hauptverfasser: | , |
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Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Boston u.a.
Kluwer
1993
|
Schriftenreihe: | The Kluwer international series in engineering and computer science
232 : VLSI, computer architecture and digital signal processing |
Schlagworte: | |
Zusammenfassung: | The design of asynchronous circuits is increasingly important in solving problems such as complexity management, modularity, power consumption and clock distribution in large digital integrated circuits Algorithms for Synthesis and Testing of Asynchronous Circuits describes a variety of mathematical models and algorithms that form the backbone and the body of a new design methodology for asynchronous design. The book is intended for asynchronous hardware designers, for computer-aided tool experts, and for digital designers interested in exploring the possibility of designing asynchronous circuits. It requires a solid mathematical background in discrete event systems and algorithms While the book has not been written as a textbook, nevertheless it could be used as a reference book in an advanced course in logic synthesis or asynchronous design. Algorithms for Synthesis and Testing of Asynchronous Circuits also includes an extensive literature review. The review summarizes and compares classical papers from the 1960s with the most recent developments in the areas of asynchronous circuit design testing and verification |
Beschreibung: | XVIII, 339 S. graph. Darst. |
ISBN: | 0792393643 |
Internformat
MARC
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490 | 1 | |a The Kluwer international series in engineering and computer science |v 232 : VLSI, computer architecture and digital signal processing | |
520 | 3 | |a The design of asynchronous circuits is increasingly important in solving problems such as complexity management, modularity, power consumption and clock distribution in large digital integrated circuits | |
520 | |a Algorithms for Synthesis and Testing of Asynchronous Circuits describes a variety of mathematical models and algorithms that form the backbone and the body of a new design methodology for asynchronous design. The book is intended for asynchronous hardware designers, for computer-aided tool experts, and for digital designers interested in exploring the possibility of designing asynchronous circuits. It requires a solid mathematical background in discrete event systems and algorithms | ||
520 | |a While the book has not been written as a textbook, nevertheless it could be used as a reference book in an advanced course in logic synthesis or asynchronous design. Algorithms for Synthesis and Testing of Asynchronous Circuits also includes an extensive literature review. The review summarizes and compares classical papers from the 1960s with the most recent developments in the areas of asynchronous circuit design testing and verification | ||
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Datensatz im Suchindex
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any_adam_object | |
author | Lavagno, Luciano Sangiovanni-Vincentelli, Alberto |
author_facet | Lavagno, Luciano Sangiovanni-Vincentelli, Alberto |
author_role | aut aut |
author_sort | Lavagno, Luciano |
author_variant | l l ll a s v asv |
building | Verbundindex |
bvnumber | BV008166825 |
callnumber-first | T - Technology |
callnumber-label | TK7888 |
callnumber-raw | TK7888.4 |
callnumber-search | TK7888.4 |
callnumber-sort | TK 47888.4 |
callnumber-subject | TK - Electrical and Nuclear Engineering |
classification_rvk | ST 190 |
classification_tum | ELT 459f |
ctrlnum | (OCoLC)27975284 (DE-599)BVBBV008166825 |
dewey-full | 621.39/5 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.39/5 |
dewey-search | 621.39/5 |
dewey-sort | 3621.39 15 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Book |
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id | DE-604.BV008166825 |
illustrated | Illustrated |
indexdate | 2024-07-09T17:15:39Z |
institution | BVB |
isbn | 0792393643 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-005388809 |
oclc_num | 27975284 |
open_access_boolean | |
owner | DE-739 DE-91 DE-BY-TUM |
owner_facet | DE-739 DE-91 DE-BY-TUM |
physical | XVIII, 339 S. graph. Darst. |
publishDate | 1993 |
publishDateSearch | 1993 |
publishDateSort | 1993 |
publisher | Kluwer |
record_format | marc |
series | The Kluwer international series in engineering and computer science |
series2 | The Kluwer international series in engineering and computer science |
spelling | Lavagno, Luciano Verfasser aut Algorithms for synthesis and testing of asynchronous circuits Luciano Lavagno ; Alberto Sangiovanni-Vincentelli Boston u.a. Kluwer 1993 XVIII, 339 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier The Kluwer international series in engineering and computer science 232 : VLSI, computer architecture and digital signal processing The design of asynchronous circuits is increasingly important in solving problems such as complexity management, modularity, power consumption and clock distribution in large digital integrated circuits Algorithms for Synthesis and Testing of Asynchronous Circuits describes a variety of mathematical models and algorithms that form the backbone and the body of a new design methodology for asynchronous design. The book is intended for asynchronous hardware designers, for computer-aided tool experts, and for digital designers interested in exploring the possibility of designing asynchronous circuits. It requires a solid mathematical background in discrete event systems and algorithms While the book has not been written as a textbook, nevertheless it could be used as a reference book in an advanced course in logic synthesis or asynchronous design. Algorithms for Synthesis and Testing of Asynchronous Circuits also includes an extensive literature review. The review summarizes and compares classical papers from the 1960s with the most recent developments in the areas of asynchronous circuit design testing and verification Circuitos integrados larpcal Mathematisches Modell Asynchronous circuits Mathematical models Asynchronous circuits Testing Electronic digital computers Circuits Mathematical models Electronic digital computers Circuits Testing Asynchrones Schaltwerk (DE-588)4271581-7 gnd rswk-swf Asynchrones Schaltwerk (DE-588)4271581-7 s DE-604 Sangiovanni-Vincentelli, Alberto Verfasser aut The Kluwer international series in engineering and computer science 232 : VLSI, computer architecture and digital signal processing (DE-604)BV023545171 232 |
spellingShingle | Lavagno, Luciano Sangiovanni-Vincentelli, Alberto Algorithms for synthesis and testing of asynchronous circuits The Kluwer international series in engineering and computer science Circuitos integrados larpcal Mathematisches Modell Asynchronous circuits Mathematical models Asynchronous circuits Testing Electronic digital computers Circuits Mathematical models Electronic digital computers Circuits Testing Asynchrones Schaltwerk (DE-588)4271581-7 gnd |
subject_GND | (DE-588)4271581-7 |
title | Algorithms for synthesis and testing of asynchronous circuits |
title_auth | Algorithms for synthesis and testing of asynchronous circuits |
title_exact_search | Algorithms for synthesis and testing of asynchronous circuits |
title_full | Algorithms for synthesis and testing of asynchronous circuits Luciano Lavagno ; Alberto Sangiovanni-Vincentelli |
title_fullStr | Algorithms for synthesis and testing of asynchronous circuits Luciano Lavagno ; Alberto Sangiovanni-Vincentelli |
title_full_unstemmed | Algorithms for synthesis and testing of asynchronous circuits Luciano Lavagno ; Alberto Sangiovanni-Vincentelli |
title_short | Algorithms for synthesis and testing of asynchronous circuits |
title_sort | algorithms for synthesis and testing of asynchronous circuits |
topic | Circuitos integrados larpcal Mathematisches Modell Asynchronous circuits Mathematical models Asynchronous circuits Testing Electronic digital computers Circuits Mathematical models Electronic digital computers Circuits Testing Asynchrones Schaltwerk (DE-588)4271581-7 gnd |
topic_facet | Circuitos integrados Mathematisches Modell Asynchronous circuits Mathematical models Asynchronous circuits Testing Electronic digital computers Circuits Mathematical models Electronic digital computers Circuits Testing Asynchrones Schaltwerk |
volume_link | (DE-604)BV023545171 |
work_keys_str_mv | AT lavagnoluciano algorithmsforsynthesisandtestingofasynchronouscircuits AT sangiovannivincentellialberto algorithmsforsynthesisandtestingofasynchronouscircuits |