High-level synthesis of VLSI circuits:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | Undetermined |
| Veröffentlicht: |
Edinburgh
Univ., Dep. of Computer Science
1992
|
| Schlagworte: | |
| Beschreibung: | Zugl.: Edinburgh, Univ., Diss., 1992 |
| Beschreibung: | 185 S. graph. Darst. |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV008028635 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | t | ||
| 008 | 930713s1992 d||| m||| 00||| und d | ||
| 035 | |a (OCoLC)633011571 | ||
| 035 | |a (DE-599)BVBBV008028635 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | |a und | ||
| 049 | |a DE-91G | ||
| 084 | |a ELT 355f |2 stub | ||
| 088 | |a CST 94 92 | ||
| 100 | 1 | |a Yeung, Ping F. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a High-level synthesis of VLSI circuits |
| 246 | 1 | 3 | |a CST 94 92 |
| 264 | 1 | |a Edinburgh |b Univ., Dep. of Computer Science |c 1992 | |
| 300 | |a 185 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 500 | |a Zugl.: Edinburgh, Univ., Diss., 1992 | ||
| 655 | 7 | |0 (DE-588)4113937-9 |a Hochschulschrift |2 gnd-content | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-005282898 | ||
Datensatz im Suchindex
| _version_ | 1804122392981667840 |
|---|---|
| any_adam_object | |
| author | Yeung, Ping F. |
| author_facet | Yeung, Ping F. |
| author_role | aut |
| author_sort | Yeung, Ping F. |
| author_variant | p f y pf pfy |
| building | Verbundindex |
| bvnumber | BV008028635 |
| classification_tum | ELT 355f |
| ctrlnum | (OCoLC)633011571 (DE-599)BVBBV008028635 |
| discipline | Elektrotechnik |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>00865nam a2200301 c 4500</leader><controlfield tag="001">BV008028635</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">930713s1992 d||| m||| 00||| und d</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)633011571</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV008028635</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1=" " ind2=" "><subfield code="a">und</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91G</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ELT 355f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="088" ind1=" " ind2=" "><subfield code="a">CST 94 92</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Yeung, Ping F.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">High-level synthesis of VLSI circuits</subfield></datafield><datafield tag="246" ind1="1" ind2="3"><subfield code="a">CST 94 92</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Edinburgh</subfield><subfield code="b">Univ., Dep. of Computer Science</subfield><subfield code="c">1992</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">185 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Zugl.: Edinburgh, Univ., Diss., 1992</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="0">(DE-588)4113937-9</subfield><subfield code="a">Hochschulschrift</subfield><subfield code="2">gnd-content</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-005282898</subfield></datafield></record></collection> |
| genre | (DE-588)4113937-9 Hochschulschrift gnd-content |
| genre_facet | Hochschulschrift |
| id | DE-604.BV008028635 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T17:13:09Z |
| institution | BVB |
| language | Undetermined |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-005282898 |
| oclc_num | 633011571 |
| open_access_boolean | |
| owner | DE-91G DE-BY-TUM |
| owner_facet | DE-91G DE-BY-TUM |
| physical | 185 S. graph. Darst. |
| publishDate | 1992 |
| publishDateSearch | 1992 |
| publishDateSort | 1992 |
| publisher | Univ., Dep. of Computer Science |
| record_format | marc |
| spelling | Yeung, Ping F. Verfasser aut High-level synthesis of VLSI circuits CST 94 92 Edinburgh Univ., Dep. of Computer Science 1992 185 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Zugl.: Edinburgh, Univ., Diss., 1992 (DE-588)4113937-9 Hochschulschrift gnd-content |
| spellingShingle | Yeung, Ping F. High-level synthesis of VLSI circuits |
| subject_GND | (DE-588)4113937-9 |
| title | High-level synthesis of VLSI circuits |
| title_alt | CST 94 92 |
| title_auth | High-level synthesis of VLSI circuits |
| title_exact_search | High-level synthesis of VLSI circuits |
| title_full | High-level synthesis of VLSI circuits |
| title_fullStr | High-level synthesis of VLSI circuits |
| title_full_unstemmed | High-level synthesis of VLSI circuits |
| title_short | High-level synthesis of VLSI circuits |
| title_sort | high level synthesis of vlsi circuits |
| topic_facet | Hochschulschrift |
| work_keys_str_mv | AT yeungpingf highlevelsynthesisofvlsicircuits AT yeungpingf cst9492 |