Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen:
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| Main Authors: | , , |
|---|---|
| Format: | Book |
| Language: | German |
| Published: |
Karlsruhe
Fachinformationszentrum Energie, Physik, Mathematik
1983
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| Subjects: | |
| Physical Description: | 80 S. graph. Darst. |
Staff View
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV007601789 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | t | ||
| 008 | 930421s1983 d||| |||| 00||| ger d | ||
| 035 | |a (OCoLC)74625620 | ||
| 035 | |a (DE-599)BVBBV007601789 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a ger | |
| 049 | |a DE-355 | ||
| 100 | 1 | |a Gross, Alexander |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen |c Alexander Gross ; Wilfried Jud ; Uwe Jaeger* |
| 246 | 1 | 3 | |a Reportnr. BMFT-FB-T 83-077 |
| 264 | 1 | |a Karlsruhe |b Fachinformationszentrum Energie, Physik, Mathematik |c 1983 | |
| 300 | |a 80 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 0 | 7 | |a Entwurf |0 (DE-588)4121208-3 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a CAD |0 (DE-588)4069794-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 0 | 1 | |a Entwurf |0 (DE-588)4121208-3 |D s |
| 689 | 0 | 2 | |a CAD |0 (DE-588)4069794-0 |D s |
| 689 | 0 | |8 1\p |5 DE-604 | |
| 700 | 1 | |a Jud, Wilfried |e Verfasser |4 aut | |
| 700 | 1 | |a Jaeger, Uwe |e Verfasser |0 (DE-588)109196627 |4 aut | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-004969208 | ||
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
Record in the Search Index
| _version_ | 1804121915021852672 |
|---|---|
| any_adam_object | |
| author | Gross, Alexander Jud, Wilfried Jaeger, Uwe |
| author_GND | (DE-588)109196627 |
| author_facet | Gross, Alexander Jud, Wilfried Jaeger, Uwe |
| author_role | aut aut aut |
| author_sort | Gross, Alexander |
| author_variant | a g ag w j wj u j uj |
| building | Verbundindex |
| bvnumber | BV007601789 |
| ctrlnum | (OCoLC)74625620 (DE-599)BVBBV007601789 |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01330nam a2200373 c 4500</leader><controlfield tag="001">BV007601789</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">930421s1983 d||| |||| 00||| ger d</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)74625620</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV007601789</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">ger</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-355</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Gross, Alexander</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen</subfield><subfield code="c">Alexander Gross ; Wilfried Jud ; Uwe Jaeger*</subfield></datafield><datafield tag="246" ind1="1" ind2="3"><subfield code="a">Reportnr. BMFT-FB-T 83-077</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Karlsruhe</subfield><subfield code="b">Fachinformationszentrum Energie, Physik, Mathematik</subfield><subfield code="c">1983</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">80 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">CAD</subfield><subfield code="0">(DE-588)4069794-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">CAD</subfield><subfield code="0">(DE-588)4069794-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Jud, Wilfried</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Jaeger, Uwe</subfield><subfield code="e">Verfasser</subfield><subfield code="0">(DE-588)109196627</subfield><subfield code="4">aut</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-004969208</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield></record></collection> |
| id | DE-604.BV007601789 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T17:05:33Z |
| institution | BVB |
| language | German |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-004969208 |
| oclc_num | 74625620 |
| open_access_boolean | |
| owner | DE-355 DE-BY-UBR |
| owner_facet | DE-355 DE-BY-UBR |
| physical | 80 S. graph. Darst. |
| publishDate | 1983 |
| publishDateSearch | 1983 |
| publishDateSort | 1983 |
| publisher | Fachinformationszentrum Energie, Physik, Mathematik |
| record_format | marc |
| spelling | Gross, Alexander Verfasser aut Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen Alexander Gross ; Wilfried Jud ; Uwe Jaeger* Reportnr. BMFT-FB-T 83-077 Karlsruhe Fachinformationszentrum Energie, Physik, Mathematik 1983 80 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Entwurf (DE-588)4121208-3 gnd rswk-swf CAD (DE-588)4069794-0 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf VLSI (DE-588)4117388-0 s Entwurf (DE-588)4121208-3 s CAD (DE-588)4069794-0 s 1\p DE-604 Jud, Wilfried Verfasser aut Jaeger, Uwe Verfasser (DE-588)109196627 aut 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Gross, Alexander Jud, Wilfried Jaeger, Uwe Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen Entwurf (DE-588)4121208-3 gnd CAD (DE-588)4069794-0 gnd VLSI (DE-588)4117388-0 gnd |
| subject_GND | (DE-588)4121208-3 (DE-588)4069794-0 (DE-588)4117388-0 |
| title | Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen |
| title_alt | Reportnr. BMFT-FB-T 83-077 |
| title_auth | Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen |
| title_exact_search | Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen |
| title_full | Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen Alexander Gross ; Wilfried Jud ; Uwe Jaeger* |
| title_fullStr | Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen Alexander Gross ; Wilfried Jud ; Uwe Jaeger* |
| title_full_unstemmed | Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen Alexander Gross ; Wilfried Jud ; Uwe Jaeger* |
| title_short | Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen |
| title_sort | multiprozessor cad system fur den entwurf digitaler vlsi schaltungen |
| topic | Entwurf (DE-588)4121208-3 gnd CAD (DE-588)4069794-0 gnd VLSI (DE-588)4117388-0 gnd |
| topic_facet | Entwurf CAD VLSI |
| work_keys_str_mv | AT grossalexander multiprozessorcadsystemfurdenentwurfdigitalervlsischaltungen AT judwilfried multiprozessorcadsystemfurdenentwurfdigitalervlsischaltungen AT jaegeruwe multiprozessorcadsystemfurdenentwurfdigitalervlsischaltungen AT grossalexander reportnrbmftfbt83077 AT judwilfried reportnrbmftfbt83077 AT jaegeruwe reportnrbmftfbt83077 |