Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen:
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Buch |
| Sprache: | German |
| Veröffentlicht: |
Karlsruhe
Fachinformationszentrum Energie, Physik, Mathematik
1983
|
| Schlagworte: | |
| Beschreibung: | 80 S. graph. Darst. |
Internformat
MARC
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| 100 | 1 | |a Gross, Alexander |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen |c Alexander Gross ; Wilfried Jud ; Uwe Jaeger* |
| 246 | 1 | 3 | |a Reportnr. BMFT-FB-T 83-077 |
| 264 | 1 | |a Karlsruhe |b Fachinformationszentrum Energie, Physik, Mathematik |c 1983 | |
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Datensatz im Suchindex
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| author | Gross, Alexander Jud, Wilfried Jaeger, Uwe |
| author_GND | (DE-588)109196627 |
| author_facet | Gross, Alexander Jud, Wilfried Jaeger, Uwe |
| author_role | aut aut aut |
| author_sort | Gross, Alexander |
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| building | Verbundindex |
| bvnumber | BV007601789 |
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| id | DE-604.BV007601789 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T17:05:33Z |
| institution | BVB |
| language | German |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-004969208 |
| oclc_num | 74625620 |
| open_access_boolean | |
| owner | DE-355 DE-BY-UBR |
| owner_facet | DE-355 DE-BY-UBR |
| physical | 80 S. graph. Darst. |
| publishDate | 1983 |
| publishDateSearch | 1983 |
| publishDateSort | 1983 |
| publisher | Fachinformationszentrum Energie, Physik, Mathematik |
| record_format | marc |
| spelling | Gross, Alexander Verfasser aut Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen Alexander Gross ; Wilfried Jud ; Uwe Jaeger* Reportnr. BMFT-FB-T 83-077 Karlsruhe Fachinformationszentrum Energie, Physik, Mathematik 1983 80 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Entwurf (DE-588)4121208-3 gnd rswk-swf CAD (DE-588)4069794-0 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf VLSI (DE-588)4117388-0 s Entwurf (DE-588)4121208-3 s CAD (DE-588)4069794-0 s 1\p DE-604 Jud, Wilfried Verfasser aut Jaeger, Uwe Verfasser (DE-588)109196627 aut 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Gross, Alexander Jud, Wilfried Jaeger, Uwe Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen Entwurf (DE-588)4121208-3 gnd CAD (DE-588)4069794-0 gnd VLSI (DE-588)4117388-0 gnd |
| subject_GND | (DE-588)4121208-3 (DE-588)4069794-0 (DE-588)4117388-0 |
| title | Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen |
| title_alt | Reportnr. BMFT-FB-T 83-077 |
| title_auth | Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen |
| title_exact_search | Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen |
| title_full | Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen Alexander Gross ; Wilfried Jud ; Uwe Jaeger* |
| title_fullStr | Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen Alexander Gross ; Wilfried Jud ; Uwe Jaeger* |
| title_full_unstemmed | Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen Alexander Gross ; Wilfried Jud ; Uwe Jaeger* |
| title_short | Multiprozessor-CAD-System für den Entwurf digitaler VLSI-Schaltungen |
| title_sort | multiprozessor cad system fur den entwurf digitaler vlsi schaltungen |
| topic | Entwurf (DE-588)4121208-3 gnd CAD (DE-588)4069794-0 gnd VLSI (DE-588)4117388-0 gnd |
| topic_facet | Entwurf CAD VLSI |
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