Digital hardware testing: transistor-level fault modelling and testing:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston u.a.
Artech House
1992
|
| Schriftenreihe: | The Artech House telecommunications library
|
| Schlagworte: | |
| Beschreibung: | Literaturangaben |
| Beschreibung: | XV, 317 S. zahlr. Ill., graph. Darst. |
| ISBN: | 0890065802 |
Internformat
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| 300 | |a XV, 317 S. |b zahlr. Ill., graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
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| 650 | 4 | |a Datenverarbeitung | |
| 650 | 4 | |a Electric fault location | |
| 650 | 4 | |a Electronic digital computers |x Circuits |x Testing |x Data processing | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Testing |x Data processing | |
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Datensatz im Suchindex
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| author | Rajsuman, Rochit |
| author_facet | Rajsuman, Rochit |
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| building | Verbundindex |
| bvnumber | BV007228067 |
| callnumber-first | T - Technology |
| callnumber-label | TK7888 |
| callnumber-raw | TK7888.4 |
| callnumber-search | TK7888.4 |
| callnumber-sort | TK 47888.4 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ZN 4030 |
| classification_tum | ELT 359f |
| ctrlnum | (OCoLC)25508138 (DE-599)BVBBV007228067 |
| dewey-full | 621.39/5/0287 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5/0287 |
| dewey-search | 621.39/5/0287 |
| dewey-sort | 3621.39 15 3287 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV007228067 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T16:58:02Z |
| institution | BVB |
| isbn | 0890065802 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-004629665 |
| oclc_num | 25508138 |
| open_access_boolean | |
| owner | DE-91 DE-BY-TUM |
| owner_facet | DE-91 DE-BY-TUM |
| physical | XV, 317 S. zahlr. Ill., graph. Darst. |
| publishDate | 1992 |
| publishDateSearch | 1992 |
| publishDateSort | 1992 |
| publisher | Artech House |
| record_format | marc |
| series2 | The Artech House telecommunications library |
| spelling | Rajsuman, Rochit Verfasser aut Digital hardware testing: transistor-level fault modelling and testing Rochit Rajsuman Boston u.a. Artech House 1992 XV, 317 S. zahlr. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier The Artech House telecommunications library Literaturangaben Circuitos integrados larpcal Computadores (hardware) larpcal Datenverarbeitung Electric fault location Electronic digital computers Circuits Testing Data processing Integrated circuits Very large scale integration Testing Data processing Hardware (DE-588)4023422-8 gnd rswk-swf Integrierte Schaltung (DE-588)4027242-4 gnd rswk-swf Prüftechnik (DE-588)4047610-8 gnd rswk-swf Integrierte Schaltung (DE-588)4027242-4 s Hardware (DE-588)4023422-8 s Prüftechnik (DE-588)4047610-8 s DE-604 |
| spellingShingle | Rajsuman, Rochit Digital hardware testing: transistor-level fault modelling and testing Circuitos integrados larpcal Computadores (hardware) larpcal Datenverarbeitung Electric fault location Electronic digital computers Circuits Testing Data processing Integrated circuits Very large scale integration Testing Data processing Hardware (DE-588)4023422-8 gnd Integrierte Schaltung (DE-588)4027242-4 gnd Prüftechnik (DE-588)4047610-8 gnd |
| subject_GND | (DE-588)4023422-8 (DE-588)4027242-4 (DE-588)4047610-8 |
| title | Digital hardware testing: transistor-level fault modelling and testing |
| title_auth | Digital hardware testing: transistor-level fault modelling and testing |
| title_exact_search | Digital hardware testing: transistor-level fault modelling and testing |
| title_full | Digital hardware testing: transistor-level fault modelling and testing Rochit Rajsuman |
| title_fullStr | Digital hardware testing: transistor-level fault modelling and testing Rochit Rajsuman |
| title_full_unstemmed | Digital hardware testing: transistor-level fault modelling and testing Rochit Rajsuman |
| title_short | Digital hardware testing: transistor-level fault modelling and testing |
| title_sort | digital hardware testing transistor level fault modelling and testing |
| topic | Circuitos integrados larpcal Computadores (hardware) larpcal Datenverarbeitung Electric fault location Electronic digital computers Circuits Testing Data processing Integrated circuits Very large scale integration Testing Data processing Hardware (DE-588)4023422-8 gnd Integrierte Schaltung (DE-588)4027242-4 gnd Prüftechnik (DE-588)4047610-8 gnd |
| topic_facet | Circuitos integrados Computadores (hardware) Datenverarbeitung Electric fault location Electronic digital computers Circuits Testing Data processing Integrated circuits Very large scale integration Testing Data processing Hardware Integrierte Schaltung Prüftechnik |
| work_keys_str_mv | AT rajsumanrochit digitalhardwaretestingtransistorlevelfaultmodellingandtesting |