Proceedings: ICCD '90 ; Hyatt Regency Cambridge, Cambridge, Massachusetts, September 17 - 19 , 1990
Gespeichert in:
| Körperschaft: | |
|---|---|
| Format: | Tagungsbericht Buch |
| Sprache: | English |
| Veröffentlicht: |
Los Alamitos, Calif. u.a.
IEEE Computer Soc. Press
1990
|
| Schlagworte: | |
| Beschreibung: | XX, 477 S. Ill., graph. Darst. |
| ISBN: | 081862079X 0818660791 0818690798 |
Internformat
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| discipline | Maschinenbau / Maschinenwesen Elektrotechnik |
| format | Conference Proceeding Book |
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| genre_facet | Konferenzschrift 1990 Cambridge Mass. |
| id | DE-604.BV006598864 |
| illustrated | Illustrated |
| indexdate | 2025-01-10T13:19:53Z |
| institution | BVB |
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| language | English |
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| physical | XX, 477 S. Ill., graph. Darst. |
| publishDate | 1990 |
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| publisher | IEEE Computer Soc. Press |
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| spelling | International Conference on Computer Design, VLSI in Computers and Processors 1990 Cambridge, Mass. Verfasser (DE-588)5050491-5 aut Proceedings ICCD '90 ; Hyatt Regency Cambridge, Cambridge, Massachusetts, September 17 - 19 , 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors Los Alamitos, Calif. u.a. IEEE Computer Soc. Press 1990 XX, 477 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier 68040 inriac BICMOS inriac BIST inriac CAO inriac Circuits intégrés à très grande échelle - Congrès ram Japon inriag VLSI inriac algorithme inriac analyse performance inriac autotest inriac fiabilité inriac interconnexion inriac modélisation inriac mémoire inriac méthodologie inriac performance système inriac processeur dédié inriac signal systolique inriac simulation logique inriac synthèse logique inriac système grande vitesse inriac système parallèle inriac testabilité inriac tolérance panne inriac traitement signal inriac vérification formelle inriac Computer engineering Congresses Electronic digital computers Circuits Congresses Integrated circuits Very large scale integration Congresses Computerarchitektur (DE-588)4048717-9 gnd rswk-swf Entwurf (DE-588)4121208-3 gnd rswk-swf Prozessor (DE-588)4176076-1 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf CAD (DE-588)4069794-0 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 1990 Cambridge Mass. gnd-content CAD (DE-588)4069794-0 s Computerarchitektur (DE-588)4048717-9 s VLSI (DE-588)4117388-0 s DE-604 Prozessor (DE-588)4176076-1 s Entwurf (DE-588)4121208-3 s 1\p DE-604 Institute of Electrical and Electronics Engineers Sonstige (DE-588)1692-5 oth 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Proceedings ICCD '90 ; Hyatt Regency Cambridge, Cambridge, Massachusetts, September 17 - 19 , 1990 68040 inriac BICMOS inriac BIST inriac CAO inriac Circuits intégrés à très grande échelle - Congrès ram Japon inriag VLSI inriac algorithme inriac analyse performance inriac autotest inriac fiabilité inriac interconnexion inriac modélisation inriac mémoire inriac méthodologie inriac performance système inriac processeur dédié inriac signal systolique inriac simulation logique inriac synthèse logique inriac système grande vitesse inriac système parallèle inriac testabilité inriac tolérance panne inriac traitement signal inriac vérification formelle inriac Computer engineering Congresses Electronic digital computers Circuits Congresses Integrated circuits Very large scale integration Congresses Computerarchitektur (DE-588)4048717-9 gnd Entwurf (DE-588)4121208-3 gnd Prozessor (DE-588)4176076-1 gnd VLSI (DE-588)4117388-0 gnd CAD (DE-588)4069794-0 gnd |
| subject_GND | (DE-588)4048717-9 (DE-588)4121208-3 (DE-588)4176076-1 (DE-588)4117388-0 (DE-588)4069794-0 (DE-588)1071861417 |
| title | Proceedings ICCD '90 ; Hyatt Regency Cambridge, Cambridge, Massachusetts, September 17 - 19 , 1990 |
| title_auth | Proceedings ICCD '90 ; Hyatt Regency Cambridge, Cambridge, Massachusetts, September 17 - 19 , 1990 |
| title_exact_search | Proceedings ICCD '90 ; Hyatt Regency Cambridge, Cambridge, Massachusetts, September 17 - 19 , 1990 |
| title_full | Proceedings ICCD '90 ; Hyatt Regency Cambridge, Cambridge, Massachusetts, September 17 - 19 , 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors |
| title_fullStr | Proceedings ICCD '90 ; Hyatt Regency Cambridge, Cambridge, Massachusetts, September 17 - 19 , 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors |
| title_full_unstemmed | Proceedings ICCD '90 ; Hyatt Regency Cambridge, Cambridge, Massachusetts, September 17 - 19 , 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors |
| title_short | Proceedings |
| title_sort | proceedings iccd 90 hyatt regency cambridge cambridge massachusetts september 17 19 1990 |
| title_sub | ICCD '90 ; Hyatt Regency Cambridge, Cambridge, Massachusetts, September 17 - 19 , 1990 |
| topic | 68040 inriac BICMOS inriac BIST inriac CAO inriac Circuits intégrés à très grande échelle - Congrès ram Japon inriag VLSI inriac algorithme inriac analyse performance inriac autotest inriac fiabilité inriac interconnexion inriac modélisation inriac mémoire inriac méthodologie inriac performance système inriac processeur dédié inriac signal systolique inriac simulation logique inriac synthèse logique inriac système grande vitesse inriac système parallèle inriac testabilité inriac tolérance panne inriac traitement signal inriac vérification formelle inriac Computer engineering Congresses Electronic digital computers Circuits Congresses Integrated circuits Very large scale integration Congresses Computerarchitektur (DE-588)4048717-9 gnd Entwurf (DE-588)4121208-3 gnd Prozessor (DE-588)4176076-1 gnd VLSI (DE-588)4117388-0 gnd CAD (DE-588)4069794-0 gnd |
| topic_facet | 68040 BICMOS BIST CAO Circuits intégrés à très grande échelle - Congrès Japon VLSI algorithme analyse performance autotest fiabilité interconnexion modélisation mémoire méthodologie performance système processeur dédié signal systolique simulation logique synthèse logique système grande vitesse système parallèle testabilité tolérance panne traitement signal vérification formelle Computer engineering Congresses Electronic digital computers Circuits Congresses Integrated circuits Very large scale integration Congresses Computerarchitektur Entwurf Prozessor CAD Konferenzschrift 1990 Cambridge Mass. |
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