Integrating functional and temporal domains in logic design: the false path problem and its implications
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston u.a.
Kluwer
1991
|
| Schriftenreihe: | The Kluwer international series in engineering and computer science
139 : VLSI, computer architecture and digital signal processing |
| Schlagworte: | |
| Beschreibung: | XXII, 212 S. graph. Darst. |
| ISBN: | 0792391632 |
Internformat
MARC
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| 005 | 19931112 | ||
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| 035 | |a (OCoLC)23583191 | ||
| 035 | |a (DE-599)BVBBV006379046 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
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| 084 | |a ST 190 |0 (DE-625)143607: |2 rvk | ||
| 084 | |a ELT 273f |2 stub | ||
| 100 | 1 | |a MacGeer, Patrick C. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Integrating functional and temporal domains in logic design |b the false path problem and its implications |c by Patrick C. McGeer and Robert K. Brayton |
| 264 | 1 | |a Boston u.a. |b Kluwer |c 1991 | |
| 300 | |a XXII, 212 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 1 | |a The Kluwer international series in engineering and computer science |v 139 : VLSI, computer architecture and digital signal processing | |
| 650 | 4 | |a Datenverarbeitung | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Computer-aided design | |
| 650 | 4 | |a Logic design |x Data processing | |
| 650 | 0 | 7 | |a Logischer Entwurf |0 (DE-588)4168051-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
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| 689 | 0 | 1 | |a Logischer Entwurf |0 (DE-588)4168051-0 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Brayton, Robert K. |e Verfasser |4 aut | |
| 830 | 0 | |a The Kluwer international series in engineering and computer science |v 139 : VLSI, computer architecture and digital signal processing |w (DE-604)BV023545171 |9 139 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-004037344 | ||
Datensatz im Suchindex
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| any_adam_object | |
| author | MacGeer, Patrick C. Brayton, Robert K. |
| author_facet | MacGeer, Patrick C. Brayton, Robert K. |
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| author_sort | MacGeer, Patrick C. |
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| callnumber-sort | TK 47868 L6 |
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| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV006379046 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T16:45:04Z |
| institution | BVB |
| isbn | 0792391632 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-004037344 |
| oclc_num | 23583191 |
| open_access_boolean | |
| owner | DE-739 DE-20 DE-29T DE-91 DE-BY-TUM |
| owner_facet | DE-739 DE-20 DE-29T DE-91 DE-BY-TUM |
| physical | XXII, 212 S. graph. Darst. |
| publishDate | 1991 |
| publishDateSearch | 1991 |
| publishDateSort | 1991 |
| publisher | Kluwer |
| record_format | marc |
| series | The Kluwer international series in engineering and computer science |
| series2 | The Kluwer international series in engineering and computer science |
| spelling | MacGeer, Patrick C. Verfasser aut Integrating functional and temporal domains in logic design the false path problem and its implications by Patrick C. McGeer and Robert K. Brayton Boston u.a. Kluwer 1991 XXII, 212 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier The Kluwer international series in engineering and computer science 139 : VLSI, computer architecture and digital signal processing Datenverarbeitung Integrated circuits Very large scale integration Computer-aided design Logic design Data processing Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf VLSI (DE-588)4117388-0 s Logischer Entwurf (DE-588)4168051-0 s DE-604 Brayton, Robert K. Verfasser aut The Kluwer international series in engineering and computer science 139 : VLSI, computer architecture and digital signal processing (DE-604)BV023545171 139 |
| spellingShingle | MacGeer, Patrick C. Brayton, Robert K. Integrating functional and temporal domains in logic design the false path problem and its implications The Kluwer international series in engineering and computer science Datenverarbeitung Integrated circuits Very large scale integration Computer-aided design Logic design Data processing Logischer Entwurf (DE-588)4168051-0 gnd VLSI (DE-588)4117388-0 gnd |
| subject_GND | (DE-588)4168051-0 (DE-588)4117388-0 |
| title | Integrating functional and temporal domains in logic design the false path problem and its implications |
| title_auth | Integrating functional and temporal domains in logic design the false path problem and its implications |
| title_exact_search | Integrating functional and temporal domains in logic design the false path problem and its implications |
| title_full | Integrating functional and temporal domains in logic design the false path problem and its implications by Patrick C. McGeer and Robert K. Brayton |
| title_fullStr | Integrating functional and temporal domains in logic design the false path problem and its implications by Patrick C. McGeer and Robert K. Brayton |
| title_full_unstemmed | Integrating functional and temporal domains in logic design the false path problem and its implications by Patrick C. McGeer and Robert K. Brayton |
| title_short | Integrating functional and temporal domains in logic design |
| title_sort | integrating functional and temporal domains in logic design the false path problem and its implications |
| title_sub | the false path problem and its implications |
| topic | Datenverarbeitung Integrated circuits Very large scale integration Computer-aided design Logic design Data processing Logischer Entwurf (DE-588)4168051-0 gnd VLSI (DE-588)4117388-0 gnd |
| topic_facet | Datenverarbeitung Integrated circuits Very large scale integration Computer-aided design Logic design Data processing Logischer Entwurf VLSI |
| volume_link | (DE-604)BV023545171 |
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