RISC architecture:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English French |
| Veröffentlicht: |
London u.a.
Chapman & Hall
1992
|
| Ausgabe: | 1. ed. |
| Schlagworte: | |
| Beschreibung: | Literaturverz. S. 238 - 251 |
| Beschreibung: | IX, 261 S. graph. Darst. |
| ISBN: | 0412453401 |
Internformat
MARC
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| 035 | |a (DE-599)BVBBV006149296 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 1 | |a eng |h fre | |
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| 100 | 1 | |a Heudin, J. C. |e Verfasser |4 aut | |
| 240 | 1 | 0 | |a Les architectures RISC |
| 245 | 1 | 0 | |a RISC architecture |c J. C. Heudin and C. Panetto |
| 250 | |a 1. ed. | ||
| 264 | 1 | |a London u.a. |b Chapman & Hall |c 1992 | |
| 300 | |a IX, 261 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 500 | |a Literaturverz. S. 238 - 251 | ||
| 650 | 4 | |a Computers - Design | |
| 650 | 4 | |a Microprocessors - Design | |
| 650 | 7 | |a RISC |2 swd | |
| 650 | 4 | |a Computer architecture | |
| 650 | 4 | |a RISC microprocessors | |
| 650 | 4 | |a Reduced instruction set computers | |
| 650 | 0 | 7 | |a RISC |0 (DE-588)4191875-7 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a RISC |0 (DE-588)4191875-7 |D s |
| 689 | 0 | |8 1\p |5 DE-604 | |
| 700 | 1 | |a Panetto, C. |e Verfasser |4 aut | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-003888417 | ||
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
Datensatz im Suchindex
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|---|---|
| any_adam_object | |
| author | Heudin, J. C. Panetto, C. |
| author_facet | Heudin, J. C. Panetto, C. |
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| building | Verbundindex |
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| callnumber-search | QA76.9.A73 |
| callnumber-sort | QA 276.9 A73 |
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| classification_tum | DAT 200f |
| ctrlnum | (OCoLC)26543167 (DE-599)BVBBV006149296 |
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| dewey-ones | 004 - Computer science |
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| dewey-sort | 14.256 |
| dewey-tens | 000 - Computer science, information, general works |
| discipline | Informatik |
| edition | 1. ed. |
| format | Book |
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| id | DE-604.BV006149296 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T16:41:07Z |
| institution | BVB |
| isbn | 0412453401 |
| language | English French |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-003888417 |
| oclc_num | 26543167 |
| open_access_boolean | |
| owner | DE-91G DE-BY-TUM |
| owner_facet | DE-91G DE-BY-TUM |
| physical | IX, 261 S. graph. Darst. |
| publishDate | 1992 |
| publishDateSearch | 1992 |
| publishDateSort | 1992 |
| publisher | Chapman & Hall |
| record_format | marc |
| spelling | Heudin, J. C. Verfasser aut Les architectures RISC RISC architecture J. C. Heudin and C. Panetto 1. ed. London u.a. Chapman & Hall 1992 IX, 261 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Literaturverz. S. 238 - 251 Computers - Design Microprocessors - Design RISC swd Computer architecture RISC microprocessors Reduced instruction set computers RISC (DE-588)4191875-7 gnd rswk-swf RISC (DE-588)4191875-7 s 1\p DE-604 Panetto, C. Verfasser aut 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Heudin, J. C. Panetto, C. RISC architecture Computers - Design Microprocessors - Design RISC swd Computer architecture RISC microprocessors Reduced instruction set computers RISC (DE-588)4191875-7 gnd |
| subject_GND | (DE-588)4191875-7 |
| title | RISC architecture |
| title_alt | Les architectures RISC |
| title_auth | RISC architecture |
| title_exact_search | RISC architecture |
| title_full | RISC architecture J. C. Heudin and C. Panetto |
| title_fullStr | RISC architecture J. C. Heudin and C. Panetto |
| title_full_unstemmed | RISC architecture J. C. Heudin and C. Panetto |
| title_short | RISC architecture |
| title_sort | risc architecture |
| topic | Computers - Design Microprocessors - Design RISC swd Computer architecture RISC microprocessors Reduced instruction set computers RISC (DE-588)4191875-7 gnd |
| topic_facet | Computers - Design Microprocessors - Design RISC Computer architecture RISC microprocessors Reduced instruction set computers |
| work_keys_str_mv | AT heudinjc lesarchitecturesrisc AT panettoc lesarchitecturesrisc AT heudinjc riscarchitecture AT panettoc riscarchitecture |