Synthesis of VHDL test environments from temporal logic specifications:
Gespeichert in:
1. Verfasser: | |
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Format: | Buch |
Sprache: | German |
Veröffentlicht: |
Oldenburg
Carl-v.-Ossietzky-Univ., Fachbereich Informatik
1992
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Schriftenreihe: | Universität <Oldenburg> / Fachbereich Informatik: Berichte aus dem Fachbereich Informatik der Universität Oldenburg
1992,4 |
Beschreibung: | 30 S. graph. Darst. |
Internformat
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999 | |a oai:aleph.bib-bvb.de:BVB01-003871921 |
Datensatz im Suchindex
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any_adam_object | |
author | Korf, Franz |
author_facet | Korf, Franz |
author_role | aut |
author_sort | Korf, Franz |
author_variant | f k fk |
building | Verbundindex |
bvnumber | BV006128257 |
classification_rvk | SS 5560 |
ctrlnum | (OCoLC)75344693 (DE-599)BVBBV006128257 |
discipline | Informatik |
format | Book |
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id | DE-604.BV006128257 |
illustrated | Illustrated |
indexdate | 2024-07-09T16:40:43Z |
institution | BVB |
language | German |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-003871921 |
oclc_num | 75344693 |
open_access_boolean | |
owner | DE-12 DE-91G DE-BY-TUM DE-739 DE-29T |
owner_facet | DE-12 DE-91G DE-BY-TUM DE-739 DE-29T |
physical | 30 S. graph. Darst. |
publishDate | 1992 |
publishDateSearch | 1992 |
publishDateSort | 1992 |
publisher | Carl-v.-Ossietzky-Univ., Fachbereich Informatik |
record_format | marc |
series2 | Universität <Oldenburg> / Fachbereich Informatik: Berichte aus dem Fachbereich Informatik der Universität Oldenburg |
spelling | Korf, Franz Verfasser aut Synthesis of VHDL test environments from temporal logic specifications Franz Korf Oldenburg Carl-v.-Ossietzky-Univ., Fachbereich Informatik 1992 30 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Universität <Oldenburg> / Fachbereich Informatik: Berichte aus dem Fachbereich Informatik der Universität Oldenburg 1992,4 Fachbereich Informatik: Berichte aus dem Fachbereich Informatik der Universität Oldenburg Universität <Oldenburg> 1992,4 (DE-604)BV000900143 1992,4 |
spellingShingle | Korf, Franz Synthesis of VHDL test environments from temporal logic specifications |
title | Synthesis of VHDL test environments from temporal logic specifications |
title_auth | Synthesis of VHDL test environments from temporal logic specifications |
title_exact_search | Synthesis of VHDL test environments from temporal logic specifications |
title_full | Synthesis of VHDL test environments from temporal logic specifications Franz Korf |
title_fullStr | Synthesis of VHDL test environments from temporal logic specifications Franz Korf |
title_full_unstemmed | Synthesis of VHDL test environments from temporal logic specifications Franz Korf |
title_short | Synthesis of VHDL test environments from temporal logic specifications |
title_sort | synthesis of vhdl test environments from temporal logic specifications |
volume_link | (DE-604)BV000900143 |
work_keys_str_mv | AT korffranz synthesisofvhdltestenvironmentsfromtemporallogicspecifications |