Verfügbarkeit: Computer logic, testing and verification

Computer logic, testing and verification:

Gespeichert in:

Bibliographische Detailangaben
1. Verfasser:	Roth, John Paul (VerfasserIn)
Format:	Buch
Sprache:	English
Veröffentlicht:	London Pitman 1980
Schriftenreihe:	Digital system design series.
Schlagworte:	circuit logique conception logique logique informatique test circuit vérification logique Electronic digital computers > Testing Logic design Logik Computer Informatik Datenverarbeitung Logischer Entwurf
Beschreibung:	XX, 176 S. graph. Darst.
ISBN:	0914894625 0273084755

Internformat

MARC


LEADER	00000nam a2200000 c 4500
001	BV006118846
003	DE-604
005	20060209
007	t
008	921030s1980 d\|\|\| \|\|\|\| 00\|\|\| eng d
020			\|a 0914894625 \|9 0-914894-62-5
020			\|a 0273084755 \|9 0-273-08475-5
035			\|a (OCoLC)16552751
035			\|a (DE-599)BVBBV006118846
040			\|a DE-604 \|b ger \|e rakddb
041	0		\|a eng
049			\|a DE-29T
050		0	\|a TK7888.3
082	0		\|a 621.3819/582 \|2 19
082	0		\|a 621.395 \|2 19
084			\|a ST 120 \|0 (DE-625)143585: \|2 rvk
084			\|a ST 195 \|0 (DE-625)143608: \|2 rvk
100	1		\|a Roth, John Paul \|e Verfasser \|4 aut
245	1	0	\|a Computer logic, testing and verification
264		1	\|a London \|b Pitman \|c 1980
300			\|a XX, 176 S. \|b graph. Darst.
336			\|b txt \|2 rdacontent
337			\|b n \|2 rdamedia
338			\|b nc \|2 rdacarrier
490	0		\|a Digital system design series.
650		7	\|a circuit logique \|2 inriac
650		7	\|a conception logique \|2 inriac
650		7	\|a logique informatique \|2 inriac
650		7	\|a test circuit \|2 inriac
650		7	\|a vérification logique \|2 inriac
650		4	\|a Electronic digital computers \|x Testing
650		4	\|a Logic design
650	0	7	\|a Logik \|0 (DE-588)4036202-4 \|2 gnd \|9 rswk-swf
650	0	7	\|a Computer \|0 (DE-588)4070083-5 \|2 gnd \|9 rswk-swf
650	0	7	\|a Informatik \|0 (DE-588)4026894-9 \|2 gnd \|9 rswk-swf
650	0	7	\|a Datenverarbeitung \|0 (DE-588)4011152-0 \|2 gnd \|9 rswk-swf
650	0	7	\|a Logischer Entwurf \|0 (DE-588)4168051-0 \|2 gnd \|9 rswk-swf
689	0	0	\|a Logik \|0 (DE-588)4036202-4 \|D s
689	0	1	\|a Informatik \|0 (DE-588)4026894-9 \|D s
689	0		\|5 DE-604
689	1	0	\|a Computer \|0 (DE-588)4070083-5 \|D s
689	1	1	\|a Logischer Entwurf \|0 (DE-588)4168051-0 \|D s
689	1		\|5 DE-604
689	2	0	\|a Datenverarbeitung \|0 (DE-588)4011152-0 \|D s
689	2	1	\|a Logik \|0 (DE-588)4036202-4 \|D s
689	2		\|8 1\p \|5 DE-604
999			\|a oai:aleph.bib-bvb.de:BVB01-003865461
883	1		\|8 1\p \|a cgwrk \|d 20201028 \|q DE-101 \|u https://d-nb.info/provenance/plan#cgwrk

Datensatz im Suchindex

_version_	1804120342514368512
any_adam_object
author	Roth, John Paul
author_facet	Roth, John Paul
author_role	aut
author_sort	Roth, John Paul
author_variant	j p r jp jpr
building	Verbundindex
bvnumber	BV006118846
callnumber-first	T - Technology
callnumber-label	TK7888
callnumber-raw	TK7888.3
callnumber-search	TK7888.3
callnumber-sort	TK 47888.3
callnumber-subject	TK - Electrical and Nuclear Engineering
classification_rvk	ST 120 ST 195
ctrlnum	(OCoLC)16552751 (DE-599)BVBBV006118846
dewey-full	621.3819/582 621.395
dewey-hundreds	600 - Technology (Applied sciences)
dewey-ones	621 - Applied physics
dewey-raw	621.3819/582 621.395
dewey-search	621.3819/582 621.395
dewey-sort	3621.3819 3582
dewey-tens	620 - Engineering and allied operations
discipline	Informatik Elektrotechnik / Elektronik / Nachrichtentechnik
format	Book
fullrecord	<?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02011nam a2200601 c 4500</leader><controlfield tag="001">BV006118846</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20060209 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">921030s1980 d\|\|\| \|\|\|\| 00\|\|\| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0914894625</subfield><subfield code="9">0-914894-62-5</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0273084755</subfield><subfield code="9">0-273-08475-5</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)16552751</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV006118846</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-29T</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7888.3</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3819/582</subfield><subfield code="2">19</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.395</subfield><subfield code="2">19</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 120</subfield><subfield code="0">(DE-625)143585:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 195</subfield><subfield code="0">(DE-625)143608:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Roth, John Paul</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Computer logic, testing and verification</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">London</subfield><subfield code="b">Pitman</subfield><subfield code="c">1980</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XX, 176 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">Digital system design series.</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">circuit logique</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">conception logique</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">logique informatique</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">test circuit</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">vérification logique</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic digital computers</subfield><subfield code="x">Testing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic design</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logik</subfield><subfield code="0">(DE-588)4036202-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Computer</subfield><subfield code="0">(DE-588)4070083-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Informatik</subfield><subfield code="0">(DE-588)4026894-9</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Datenverarbeitung</subfield><subfield code="0">(DE-588)4011152-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Logik</subfield><subfield code="0">(DE-588)4036202-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Informatik</subfield><subfield code="0">(DE-588)4026894-9</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">Computer</subfield><subfield code="0">(DE-588)4070083-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="1"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="2" ind2="0"><subfield code="a">Datenverarbeitung</subfield><subfield code="0">(DE-588)4011152-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="2" ind2="1"><subfield code="a">Logik</subfield><subfield code="0">(DE-588)4036202-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="2" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-003865461</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield></record></collection>
id	DE-604.BV006118846
illustrated	Illustrated
indexdate	2024-07-09T16:40:34Z
institution	BVB
isbn	0914894625 0273084755
language	English
oai_aleph_id	oai:aleph.bib-bvb.de:BVB01-003865461
oclc_num	16552751
open_access_boolean
owner	DE-29T
owner_facet	DE-29T
physical	XX, 176 S. graph. Darst.
publishDate	1980
publishDateSearch	1980
publishDateSort	1980
publisher	Pitman
record_format	marc
series2	Digital system design series.
spelling	Roth, John Paul Verfasser aut Computer logic, testing and verification London Pitman 1980 XX, 176 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Digital system design series. circuit logique inriac conception logique inriac logique informatique inriac test circuit inriac vérification logique inriac Electronic digital computers Testing Logic design Logik (DE-588)4036202-4 gnd rswk-swf Computer (DE-588)4070083-5 gnd rswk-swf Informatik (DE-588)4026894-9 gnd rswk-swf Datenverarbeitung (DE-588)4011152-0 gnd rswk-swf Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf Logik (DE-588)4036202-4 s Informatik (DE-588)4026894-9 s DE-604 Computer (DE-588)4070083-5 s Logischer Entwurf (DE-588)4168051-0 s Datenverarbeitung (DE-588)4011152-0 s 1\p DE-604 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk
spellingShingle	Roth, John Paul Computer logic, testing and verification circuit logique inriac conception logique inriac logique informatique inriac test circuit inriac vérification logique inriac Electronic digital computers Testing Logic design Logik (DE-588)4036202-4 gnd Computer (DE-588)4070083-5 gnd Informatik (DE-588)4026894-9 gnd Datenverarbeitung (DE-588)4011152-0 gnd Logischer Entwurf (DE-588)4168051-0 gnd
subject_GND	(DE-588)4036202-4 (DE-588)4070083-5 (DE-588)4026894-9 (DE-588)4011152-0 (DE-588)4168051-0
title	Computer logic, testing and verification
title_auth	Computer logic, testing and verification
title_exact_search	Computer logic, testing and verification
title_full	Computer logic, testing and verification
title_fullStr	Computer logic, testing and verification
title_full_unstemmed	Computer logic, testing and verification
title_short	Computer logic, testing and verification
title_sort	computer logic testing and verification
topic	circuit logique inriac conception logique inriac logique informatique inriac test circuit inriac vérification logique inriac Electronic digital computers Testing Logic design Logik (DE-588)4036202-4 gnd Computer (DE-588)4070083-5 gnd Informatik (DE-588)4026894-9 gnd Datenverarbeitung (DE-588)4011152-0 gnd Logischer Entwurf (DE-588)4168051-0 gnd
topic_facet	circuit logique conception logique logique informatique test circuit vérification logique Electronic digital computers Testing Logic design Logik Computer Informatik Datenverarbeitung Logischer Entwurf
work_keys_str_mv	AT rothjohnpaul computerlogictestingandverification

Verfügbarkeit

Es ist kein Print-Exemplar vorhanden.

Fernleihe Bestellen Achtung: Nicht im THWS-Bestand!

MARC

Datensatz im Suchindex

Es ist kein Print-Exemplar vorhanden.

Ähnliche Einträge