Proceedings of the IEEE 1991 Custom Integrated Circuits Conference: Town & Country Hotel San Diego, California, May 12 - 15, 1991
Gespeichert in:
| Körperschaft: | |
|---|---|
| Format: | Tagungsbericht Buch |
| Sprache: | English |
| Veröffentlicht: |
New York, NY
Inst. of Electrical and Electronics Engineers
1991
|
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | Literaturangaben |
| Beschreibung: | Getr. Zählung Ill., graph. Darst. |
| ISBN: | 0780300157 0780300165 0780300173 |
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| 245 | 1 | 0 | |a Proceedings of the IEEE 1991 Custom Integrated Circuits Conference |b Town & Country Hotel San Diego, California, May 12 - 15, 1991 |
| 264 | 1 | |a New York, NY |b Inst. of Electrical and Electronics Engineers |c 1991 | |
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Datensatz im Suchindex
| _version_ | 1804120114867470336 |
|---|---|
| adam_text | CONTENTS
SESSION
1
SUNDAY EVENING Golden West
7:00
NEW HARDWARE PRODUCTS
H.L. Scalf, Chairman
SESSION
2
SUNDAY EVENING California
7:00
NEW HARDWARE AND SOFTWARE PRODUCTS
D. Perkins, Chairman
SESSION
3
MONDAY MORNING
_____________________________
Presidio
___________________________
PAPER
#
8:00
WELCOME/OPENING REMARKS
D. Brown, General Chairman
J. Llpman, Conference Chairman
8:20
CICC
91—
TECHNICAL PROGRAM
G. Ledenbach, Technical Program Committee Chairman
8:30
KEYNOTE ADDRESS
Global Communications in the
1
990 s and the Impact on ASICs
J.S. Mayo, Senior
VP
of Network Systems and Network Services, AT&T Bell Laboratories
9:30
SONET/ATM
Chairman: R. Corded
Co-Chairman: K. Huscroft
9:35
INVITED
ASIC Technology Applied to SONET Multiplex, Transmission, and Cross-Connect Equipment
3.1
M.A.MCDonald, Rockwell International NTSD, Dallas,
TX
10:00
A SONET
ЅТЅ-Зе
User Network
1С 3.2
T.J. Robe and K. A. Walsh, Bellcore, Red Bank, NJ
10:25
A
0.8-
/imBiCMOSSea-of-Gates Implementation of the Tandem Banyan Fast Packet Switch
3.3
P.M. Chiussi and F.A. Tobagi, Stanford University, Stanford, CA; and H.
Amano, Keio
University, Yokohama, Japan
10:50
A Multi-Speed Digital Cross-Connect Switching VLSI Using New Circuit Techniques in Dual
3.4
PortRAMs
S. Shinagawa, Hitachi VLSI,
Eng.
Co., Ltd., Tokyo, Japan; and Y. Satoh, M. Mizukami, Y. Sonobe, Y.
Nakano
and
T. Kanno, Hitachi Ltd., Japan
11:15 1
GHz CMOS
12:1
Time Division MUX/DEMUX Pair
3.5
K.R. Shastri and W.E. Carter, AT&T Bell Labs., Allentown, PA
11:40
A LSI Chip Setftwr^Gb/s Fiber Optic Transmission
3.6
S. Hatakeyama, T. Isogai, C. Konishi, M. Yagyu,
N.
Watanabe and K. Takahashi, NEC Corp., Kawasaki, Japan
CONTENTS
SESSION
4 n«„r«
MONDAY MORNING
___________________
Friars/Padre/Sierra
_________________________
PAPER
#
9:30
RELIABILITY SIMULATION AND MODELING
Chairman:
С
Zukowski
Co-Chairman: S. Cravens
9:35
TUTORIAL 4-1
1С
Reliability Simulation
C. Hu,
University of California, Berkeley, CA
10:25
Integrated Circuit Reliability Simulation Including Dynamic Stress Effects
4.2
W-J. Hsu, S.M. Gowda and B.J. Sheu, University of Southern California, Los Angeles, CA;and
С
-G.
Hwang,
Samsung Electronics, Yong In-Gun, Korea
10:50
DYNAMO: A Program forthe Simulation of Transient Faults in Digital Circuits
4.3
F.L. Yang and R.A. Saleh, University of Illinois,
Urbana,
IL
11:15
A System for Electromigration Analysis in VLSI Metal Patterns
4.4
I.N. Hajj, V.B. Rao, R. limura,
H. Cha
and R. Burch, University of Illinois,
Urbana,
IL
11 -.40
Design Model for Minority-Carrier Well-Type Guard Rings in CMOS Circuits
4.5
M.J. Chen, C.Y. Huang and C.Y. Wu, National Chiao-Tung University, Hsin-Chu, Taiwan; and P.N. Tseng and
N.S. Tsai, Taiwan Semiconductor Mfg. Co. Ltd., Hsin-Chu, Taiwan
12:05
LATE NEWS PAPER
4.6
Mixed Mode Simulation of Slow Transient Effects in AIGaAs/Ga As
HEMT
Inverters
T. Wang and S-J. Wu, National Chiao-Tung University, Hsin-Chu, Taiwan
SESSIONS
MONDAY MORNING
________________________
Golden West
___________________________
PAPER
#
9:30
ANALOG DESIGN AUTOMATION
Chairman:
T. Sideris
Co-Chairman: J. Lipman
9:35
A Design Tool for Weakly Nonlinear Analog Integrated Circuits with Multiple Inputs (Mixers,
5.1
Multipliers)
P. Wambacq, J. Vanthienen, G. Gieien and W.
Sansen,
Katholieke Univ. Leuven, Heverlee,
Belgium
10:00
SEAS: A Simulated Evolution Approach for Analog Circuit Synthesis
5.2
Z-Q.
Ning,
T.
Mouthaan and H.
Wallinga, Twente
University,
Enschede,
The Netherlands
10:25
HECTOR: A Hierarchical Topology-Construction Program for Analog Circuits Based on a
5.3
Declarative Approach to Circuit Modeling
K. Swings, S. Donnay and W.
Sansen,
Katholieke Univ. Leuven,
Heverlee, Belgium
10:50
DAVE: An Automated Mixed Analog/Digital
1С
Layout Compiler
5.4
Z-M.
ün,
University of Maryland, College Park, MD
11:15 192
Automatic Custom Layout of Analog ICs Using Constraint-Based Module Generation
D. J. Chen and B.J. Sheu, University of Southern California, Los Angeles, CA
11
:40 Fast Prototyping of Semi-Custom Bipolar Analog ASICs
5.6
Q. Buset, M. Deciercq and F. Rahali, Swiss Federal Institute of Technology, Lausanne, Switzerland; and P.
Vaucher,
ASCOM
Microelectronics, Bevaix, Switzerland
CONTENTS
SESSION
6
MONDAY MORNING
__________________________
California
_____________________________
PAPER
#
9:30
FPGA ARCHITECTURE AND APPLICATIONS
Chairman: C. McCarthy
Co-Chairman: W. Carter
9:35
Optimization of Field-Programmable Gate Array Logic Block Architecture for Speed
6.1
S. Singh, J. Rose, D. Lewis, K. Chung and P. Chow, University of Toronto, Toronto, Canada
10
:00 FPGA Performance vs. Cell Granularity
6.2
J.L. Kouloheris and A. El Gamal, Stanford University, Stanford, CA
10:25
A High-Speed BiCMOS Table Look-Up Gate
6.3
P. Baltus, P. van
der
Meulen and M. Ligthart, Philips Research, Sunnyvale, CA
10:50
A Large Scale FPGA with
1
0K Core Cells with CMOS
0.8
μ
m 3-Layered
Metal Process
6.4
H. Muroga, H.
Murata,
Y. Saeki, T.
Hib i and Y. Ohashi, Semiconductor System
Eng.
Center., Kawasaki, Japan; and
T. Noguchi and T. Nishimura, Microelectronics Center, Kawasaki, Japan
11:15
GANGLION
—
A Fast Hardware Implementation of a Connectionist Classifier
6.5
C.E. Cox and W.E. Blanz, IBM
Almadén
Research Center, San Jose, CA
11
:40 Field Programmable Gate Array Key to
Reconfigurable
Array Outperforming Supercomputers
6.6
T. Waugh, Xilinx, Inc., San Jose, CA
SESSION
7
MONDAY AFTERNOON
__________________________
Presidio
_________________________________
PAPER
#
2:00
HIGH SPEED TRANSCEIVERS AND DIGITAL CELLULAR MOBILE RADIO CIRCUITS
Chairman: D. Brown
Co-Chairman:
С
Jungo
2:05
An Error-Correcting Encoder and Decoder for a
1
Gbit/s Fiber Optic Link
7.1
C.
Benz,
M.
Gowan and K. Springer, Digital Equipment Corp., Hudson, MA
2:30
A 60-MHz 64-Tap Echo Canceller/Decision-Feedback Equalizer in
1.2
μ,χη
CMOS for
281
Q
High
7.2
Bit-Rate Digital Subscriber Line Transceivers
H.
Samueli, R.B.
Joshi, B.C. Wong, B. Daneshrad, L.K. Tan, D.
Kruse
and H.T. Nicholas, University of California,
Los Angeles, CA
2:55 10
MB/S Twisted Pair CMOS Transceiver with Transmit Waveform Pre-equalization
7.3
C
-С.
Shin, J.
Heideman,
H. Shafirand S.
Wurster,
Level One Communications, Folsom, CA
3:20
A Direct Sequence BPSK Spread Spectrum Transceiver Chip Set
7.4
C. Chien,
L.
Lau,
G.
Chen,
B-Y.
Chung,
Ρ.Τ.
Yang,
E. Cohen,
Η.
Samueli
and R. Jain, University of
California,
Los Angeles, CA
3:45
An Experimental TDMA Modulation/Demodulation CMOS VLSI Chip-Set
7.5
N.R. Sollenberger, Bellcore, Red Bank, NJ
4:10
Integrated Digital Modulator and Analog Front-End for GSM Digital Cellular Mobile Radio
7.6
System
B. Baggini, L. Coppero, G. Gazzoli and L. Sforzini, ITALTELSit,
Milano,
Italy; and F. Maloberti and G. Palmisano,
Univ.
di Pavía,
Pavia, Italy
4:35
LATE NEWS PAPER
7.7
An Integrated Si Bipolar RF Transceiver for a Zero IF
900
MHz GSM Digital Mobile Radio
Frontend
of a Hand Portable Phone
J. Sevenhans and J. Wenin, Alcatel Bell, Antwerp, Belgium; and A. Vanwelsenaers and J.
Baro,
Alcatel Radio
Telephone,
Colombes,
France
CONTENTS
4:50
LATE NEWS
PAPER 7.8
A Power Efficient Channel Coder/Decoder Chip for GSM Terminals
H.J. Busschaert and P.P. Reusens, Alcatel Bell Telephone, Antwerp, Belgium; and L. Dartois and L. Desperben,
Alcatel Thompson Radio
Tel.,
Colombes,
France
------------------------♦------------------------
SESSION
8
MONDAY AFTERNOON
___________________
Friars/Padre Sierra
__________________________
PAPER
#
2:00
CIRCUIT ANALYSIS AND SIMULATION
Chairman: R. Saleh
Co-Chaimian: B. Sheu
2:05
Improving DC Convergence in a Circuit Simulator Using a Homotopy Method
8.1
L. Trajkovic, Bellcore, Morristown, NJ; and R.C. Melville and
S
-С.
Fang, AT&T Bell Labs., Murray Hill, NJ
2:30
Reversible Functional Simulation for Digital System Design
8.2
G.Jennings, Lund Univ., Lund, Sweden
2:55
Calculation of a Total Dynamic Current of VLSI Using a Switch Level Timing Simulator (RSIM-FX)
8.3
N.
Kimura and J. Tsujimoto, Toshiba Corp., Kawasaki, Japan
3:20
Calculation and Application of Time Domain Waveform Sensitivities in Asymptotic Waveform
8.4
Evaluation
A. Balivada,
D.R. Holberg and L.T. Pillage, University of Texas, Austin,
TX
3:45
Static Charge Decay Analysis of
MOS
Circuits
8.5
G.
Bischoffand
R.
Razdan, Digital Equipment Corp., Hudson, MA
4:10
An Analytical-Model
Generator for
Interconnect Capacitances
8.6
U. Choudhury and A. Sangiovanni-Vincentelli, University of California, Berkeley, CA
4:35
Modelling Behaviour and Tolerances in Analogue Cells
8.7
T. Koskinen and P.Y.K. Cheung, Imperial College, London, England
5:00
Fast Simulated Diffusion: An Optimization Algorithm for Multi-Minimum Problems and Its
8.8
Application to MOSFET Model Parameter Extraction
T. Sakurai and M. Ichida, Toshiba Corp.
,
Kawasaki, Japan; and A.R. Newton, Univ. of California, Berkeley, CA
----------------------♦----------------------
SESSION
9
MONDAY AFTERNOON
________________________
Golden West
_______________________________
PAPER
#
2:00
FILTERS AND AMPLIFIERS
Chairman: A. Barlow
Co-Chairman:
A. Grebene
2:05
A CMOS Wideband Amplifier with
SOO
MHz Gain-bandwidth
9.1
F. Op t Eynde, Mietec Alcate!, Brussels, Belgium
;
and W.
Sansen,
Katholieke Univ. Leuven, Heverlee,
Belgium
2:30
AOiOSBicjuadatVHF
9.2
M. Snelgrove and A. Shova!, Univ. of Toronto, Toronto, Canada
2:55
An Adaptive Analog Continuous-Time CMOS Biquadratic Filter
9.3
T. Kwan and K. Martin, UCLA, Los Angeles, CA
3:20
A
50
MHz Variable Gain
Amplifier
Cell in
2
џт
CMOS
9.4
R. Gomez and
A.A.
Abidt, Univ. of Caiifomia, Los Angeles, CA
CONTENTS
3:45 2—10
MHz Programmable
Continuous-Time
.05
Degree Equiripple Linear
Phase
Filter
9.5
G.A. DeVeirman and R.G. Yamasaki, Silicon Systems, Inc., Tustin, CA
4:10
A 32Mb/s Disk Drive Data
Separator for
Constant
Density Recording
9.6
R.
Horită,
S.
Miyazawa, K,
Hase, A Hirano and S.
Kojima,
Hitachi Ltd.
,
Yokohama
City, Japan
■+-
SESSION
10
MONDAY AFTERNOON
_______________________
California
_____________________________
PAPER
#
2:00
SPECIALTY RAMS AND
APPLICATIONS
Chairman:
К.
Venkateswaran
Co-ChairmaniK.
Au
2:05
A 50-MHz
1
0ns
Submicron BiCMOS
2-Way Set Associative Cache TAG Memory
10.1
E.H.
Chiu
and Q.D. An, Texas Instruments, Dallas,
TX
2:30 2.6
Gbyte/sec Bandwidth Cache/TLB Macro for High-Performance RISC Processor
10.2
T. Takayangi, K. Sawada, M. Takahashi, Y.
Ito,
Y.
Toyoshima,
H.
Hayashida and M. Norishima, Toshiba Corp.,
Kawasaki, Japan; and M. Uchida, Toshiba Microelectronics Corp., Japan
2:55
A 288-kbit Fully Parallel Content Addressable Memory Using Stacked Capacitor Cell Structure
10.3
T. Yamagata, M.Mihara, T. Hamamoto, T. Kobayashi and M. Yamada, Mitsubishi Electric Corp.,
Itami,
Japan
3:20
New Bit Line Architecture for
Ulta
High Speed SRAMs —
Т
-Shaped Bit
Une
and It s Real
10.4
Application to
256
К
BiCMOS
TTL SRAM
T. Shiomi, T.
Wada,
S.
Ohbayashi, A. Ohba, H. Honda, Y. Ishigaki, M. Hatanaka, S/Nagao, K.
Änami
and T.
Sumi,
Mitsubishi Electric Corp.,
Itami,
Japan
3
:45 A CMOS
4
ch x
1
к
Time Memory LSI with
1
ns Resolution
10.5
Y.
Arai, KEK,
National Lab for High Energy Physics, Ibaraki, Japan; andT. Matsumura and K. Endo, NTT,
Atsugi-shi, Japan
4:10
Implementation of Sub-10ns Serial Access Mode to a Standard 64-Mb DRAM
10.6
Y. Watanabe, K. Tsuchida, Y. Oowaki, D. Takashima, M.
Onta,
H.
Nakano,
S. Watanabe and K. Ohuchi, Toshiba
Corp., Kawasaki,
Japan
4:35
A
High Speed
Memory System
Based on
16
Mb ST(Stretchable Memory Matrix)
DRAMs 10.7
T. Ooishi, M. Asakura, H. Hidaka, K.. ArimotoandK. Fujishima, Mitsubishi Electric Corp.,
Itami,
Japan
SESSION
11
TUESDAY MORNING
__________________________
Presidio
______________________________
PAPER
#
8
:30
SYNTHESIS AND VERIFICATION
Chairman:
M.
Tarsi
Co-Chairman:
T. Sideris
8:35
A
Comparison of an ASIC Synthesized Design to a Schematic Entry Design for a Viterbi Decoder
11.1
C.A. Gray and M.J.S. Smith, Univ. of Hawaii, Honolulu, HI; J. Rowson and M. O Brien, VLSI Technology, Inc.,
San Jose, CA
9:00
New State Assignment Algorithms for Finite State Machines Using Look Ahead
11.2
J.J. Yang, H. Shin and J.W. Chong, Han Yang Univ., Seoul, Korea
9
:25 Improving BDDs Manipulation Through Incremental Reduction and Enhanced Heuristics
11.3
N.
Calazans, R. Jacobi, Q. Zhang and C. Trullemans,
Université Catholique de
Louvain,
Louvain-Ia-Neuve,
Belgium
CONTENTS
9:50
A
System
for Synthesis of Sequential Machines with Built-in Testability
11.4
B.
Mitra,
Texas Instruments (India) Pvt. Ltd., Bangalore, India; and S. Misraand P. Pal Choudhuri, Indian Institute
of Technology, Kharagpur, India
10:15
Symbolic Verification of CMOS Synchronous Circuits Using Characteristic Functions
11.5
Y. Kukimoto and H. Tanaka, Univ. of Tokyo, Tokyo, Japan; and M. Fujita, Fujitsu Labs., Kawasaki, Japan
10:40
Optimal Synthesis of High Performance Architectures
11-6
C.H. Gebotys and M.I. Elmasry, University of Waterloo, Waterloo, Canada
11:05
LATE NEWS PAPER
11-7
Memory Synthesis for High Speed DSP Applications
P.E.R.
Lippens,
J.
Meerberger,
Α.
van der Werf, W.F.J. Verhaegh,
В.Т.
McSweeney, Philips Research Labs.,
Eindhoven, The Netherlands
SESSION
12
TUESDAY MORNING
_______________________
Friars/Padre/Sierra
____________________________
PAPER
#
8:30
REAL-TIME IMAGE PROCESSING
&
COMPRESSION
Chairman: P. Ivey
Co-Chairman: L. D Luna
8:35
A Single Chip Sensor
&
Image Processor for Fingerprint Verification
12.1
S. Anderson, W.H. Bruce, P.B. Denyer, D. Renshaw andG. Wang, Univ. of Edinburgh, Edinburgh, Scotland
9:00
A Complete Single-Chip Implementation of the JPEG Image Compression Standard
12.2
M. Bolton, SGS-Thomson Microelectronics, Bristol, U.K.
9:25
A
50
MHz Vision Processor
12.3
J. Fandrianto, B. Martin, H. Rainnie, S. Sutardja and
С
-S.
Wang, Integrated Information Technology, Santa Clara,
CA
9:50
A Data-Flow Processor for Real-Time Low-Level Image Processing
12.4
G.M. Quenot and B. Zavidovique, DGA/Etablis, Technique Central
de l Armement, Arcueil,
France
W
-С.
FangMrBJL
^jeJ^J^
í|^y^Gs|fo¡tT^
Los Angeles,
СА;
and
R.
Nixon, C.I.T. Jet Propulsion
Lab.,
10:40
CCD Image
Sensor with Differential, Pyramidal Output for Lossless Image Compression
12.6
S.E.
Kemény,
H.
Torby
and
H.
Meadows, Columbia, Univ., New York, NY; E.R. Fossum, CalTech, Pasadena, CA
;
and R. Bredthauer and M. LaShell, Ford Aerospace, Newport Beach, CA
11
:05 A Customizable Timing Controller for Electronic Imaging Applications
12.7
J.A. Vincent, W.A. Cook, L.J. D Luna, G.W. Brown and R.M. Guidash, Eastman Kodak Company, Rochester, NY
SESSION
13
TUESDAY MORNING
________________________
Golden West
____________________________
PAPER
#
8:30
TEST I
Chairman: S. Davidson
Co-Chairman: P. Fasang
8:35
TUTORIAL 13-1
CMOS
1С
Fault Models, Physical Defect Coverage and IDDQ Testing
R.R.
Fritzemeier
and J.M. Soden,
Sandia
National Labs., Albuquerque, NM; and
CF.
Hawkins, The Univ. of New
Mexico, Albuquerque, NM
CONTENTS
9:25
Can IDDQ
Test
Replace Conventional Stuck-Fault Test?
13.2
D.M.
Su, IBM
Corp., Boca Raton,
FL
9:50
A Comparison of Methods for Supply Current Analysis
13.3
J.F. Frenzel, Univ. of Idaho, Moscow, ID; and P.N.
Marinos,
Duke Univ., Durham, NC
10:15
Circuit Design for Built-in Current Testing
13.4
M. Patyraand W. Maly, Carnegie Mellon Univ., Pittsburgh, PA
10:40
A Framework for Design for Testability of Mixed Analog/Digital Circuits
13.5
M. Jarwala and S-J. Tsai, AT&T Bell Labs., Princeton, NJ
11
:05 An Experimental Approach to Analog Fault Models
13.6
M.
Soma,
University of Washington, Seattle, WA
SESSION
14
TUESDAY MORNING
____________________________
California
________________________________
PAPER
#
8:30
HIGH PERFORMANCE GATE ARRAYS
Chairman: G. Sporzynski
Co-Chairman: R. Blake
8:35
Can CMOS Resist the BiCMOS Challenge?
14.1
L.
Wissel
and E. Gould, IBM General Technology Division, Essex Junction, VT
9:00
Strategies for CMOS/BiCMOS Gate Usage on Sea-of-Gates Arrays
14.2
P.P. Duchene and M.J. Declercq, Swiss Fed. Inst. of Technology, Lausanne, Switzerland
9
:25 A
1
.9ns BiCMOS CAM Macro with Double Match Line Architecture
14.3
T. Nagamatsu, T. Sakurai, H.
Hara,
S.
Kobayashi,
К.
Seta and
M. Noda,
Toshiba Corp., Kawasaki, Japan;
M. Uchida, Y. Watanabe and F.
Sano,
Toshiba Micrlelectronics Corp.
,
Japan
9:50 0.5
/¿m BiCMOS
SOG
with Selectable
5v/3.3v
Operations
14.4
Y. Tanaka, T.
Sei,
S.
Ishimoto and T. Kobayashi, Toshiba Corp., Kawasaki, Japan; M. ishibashi and A. Kurahara,
Toshiba Microelectronics Corp., Japan
10:15
A BiCMOS Circuit Family for a
0.45
μ
m
CMOS/BiCMOS Sea-of-Gates 14.5
G.
Boudon,
D.
Plassat,
R.
Cullet,
R.
Trauet
and D.
Mauchauffee, IBM France, Corbeil-Essonnes, France
10:40
A Quasi-Compiementary-Logic GaAs Gate Array Employing Air-Bridge Metalization
14.6
Technology
N.
Higashisaka, M. Shimada.T. Nishimura,
N.
Sasaki, M. Noda, H. Matsuoka and S. Kayano, Mitsubishi Electric
Corp.,
Itami,
Japan
11
:05 A High-Density GaAs Gate Array Architecture
14.7
G. Lee, B. Donckels, A. Grey and I
.
Deyhimy, Vitesse Semiconductor Corp.
,
Camarillo, CA
CONTENTS
SESSION
15
TUESDAY MORNING
____________________________
Presidio
_______________________________
PAPER
#
2:00
ADVANCES IN DATA PROCESSING ELEMENTS
Chairman: S. Law
Co-Chairman: Y. Horiba
2:05
A
120
MFLOP CMOS Floating Point Processor
15.1
P.
Chai, T.
Chuk,
Y.H. Fong,
L. Hu, K. Ng, J.
Prabhu,
Α.
Quek,
Α.
Samuels
and J. Youn, Weitek Corp., Sunnyvale,
CA
2:30
A
80
MFLOPS 64-Bit Microprocessorfor Parallel Computer
15.2
H.
Nakano,
M.
Nakajima,
Y.
Nakakura,
T.
Yoshida,
Y.
Goi,
Y. Nakai,
R.
Segawa, T. Kishida and H. Kadota,
Matsushita Electric
Industrial Co. Ltd., Osaka, Japan
2:55
A
1.5
MLIPS 40-bit
Al
Processor
15.3
H. Machida, H.
Ando,
С.
Ikenaga,
H.
Nakashirna, A. Maeda and M. Nakaya, Mitsubishi Electric Corp.,
Itami,
Japan
3:20
A Two-Chip CMOS 64b Mainframe Processor Chipset
15.4
M. Yamagishi and K. Koide, Hitachi, Ltd.,Tokyo, Japan; A. lshiyarna, A. YamagiwaandT. Hayashi,
Hitachi
Ltd., Japan; and
Y. Satou,
Hitachi VLSI Engineering Co., Ltd., Tokyo, Japan
3:45
Memory Chip for 24-Port Global Register File
15.5
W. Maly, M. Patyra, A. Primatic, V. Raghavan, T. Storey and A. Wolfe, Carnegie Mellon Univ., Pittsburgh, PA
4:10
A 64b CMOS Mainframe Execution Unit Macrocell with Error Detecting Circuit
15.6
T. Hayashi, T.
Doi,
M.
Yamagishi,
К.
Koide, A. ishiyamaand M. Hiramatsu, Hitachi Ltd., Tokyo, Japan;and
A. Yamagiwa, Kanagawa Works, Kanagawa, Japan
4:35
LATE NEWS PAPER
15.7
High Performance Self-Checking Adder for VLSI Processor
F-H.W. Shih, IBM Corp.,
Yorktown
Heights, NY
4:50
LATE NEWS PAPER
15.8
3.3-
V BiCMOS Circuit Techniques for 250-MHz RISC Arithmetic Modules
K. Yano, M. Hiraki, S. Shukuri, M. Hanawa, M. Suzuki, T. Nishida and K. Seki, Hitachi Central Research
Lab.,
Tokyo, Japan; and S. Morita, A. Kawamata and
N.
Ohki, Hitachi VLSI
Eng.
Corp., Tokyo, Japan
SESSION
16
TUESDAY AFTERNOON
_____________________
Friars/Padre/Sierra
____________________________
PAPER
#
2:00
NEURAL NETWORKS AND GRAPHICS PROCESSORS
Chairman: F. Yassa
Co-Chairman: J. Barnes
2:05
A Trainable Analog Neural Chip for Image Compression
16.1
С
-F.
Chang, B.J. Sheu,
W
-С.
Fang and J. Choi, University of Southern California, Los Angeles, CA
2:30
A BiCMOS image Sensor with a Chopper-Stabilized Edge Detector
&
a Correlated-Double-
16 2
Sampling Readout Circuit for Neural Network VLSI Operating at 77K
T.L.
Chou,
E.J. Wong, W.C. Lee and J.B. Kuo, National Taiwan Univ., Taipei, Taiwan
2:55
A Hlf
h
Performance Digital Processor for Implementing Large Artificial Neural Networks
16.3
D.A. Orrey,
DJ.
Myers and J.M. Vincent, British Telecom Martlesham Heath, U.K.
3:20
A Vector Digital Signal Processor LSI for Speaker-Independent Voice Pattern Matching
16.4
N.
Matsubishi, Y. Tokuno, M. Mizutani, T. Uehara and H.
Ando,
OKI Electric Industry Co., Ltd., Tokyo, Japan
CONTENTS
3:45 100M
pixel/sec Single-Chip Integrated
Graphics Controller
(ICG)
16.5
D.
Mansharamani,
M. Birman, G. Chu, J.
Martinella,
D.
Wu,
J.
Chiou,
В.
Wallis,
M. Zhu,
K. Evans, J. McLeod,
H. Grewal, K.
Goodin and A. Samuels, WeitekCorp., Sunnyvale,
CA
4:10
A 170MHz CMOS Pixel Processor for Windowing Graphics
16.6
W.N. Schnaitter, S.L. Urmston and
A. Pon,
Brooktree Corp., San Diego, CA
4:35
LAŢE
NEWS PAPER
16.7
Digital Logarithmic CMOS Multiplier for Very-High-Speed Signal Processing
F. Hoefflinger, M. Selzer and
F. Warkowski, Institut
fur
Mikroelektronik, Stuggart,
Germany
SESSION
17
TUESDAY AFTERNOON
______________________
Golden West
____________________________
PAPER
#
2:00
TEST II
Chairman: S. Runner
Co-Chairman: P. Fasang
2:05
The Architecture of the GenTest Sequential Test Generator
17.1
R. Bencivenga, T.J. Chakraborty and S. Davidson, AT&T Bell Labs., Princeton, NJ
2:30
Test Considerations for BiCMOS Logic Families
17.2
K. Roy, Texas Instruments, Inc., Dallas,
TX;
M.E.
Levitt, Sun Microsystems, Mt. View, CA; and J.A. Abraham, Univ.
of Texas, Austin,
TX
2:55
PASCANT: A Partial Scan and Test Generation System
17.3
S. Bhawmik and C.J. Lin, AT&T Bell Labs., Princeton, NJ; and K.T. Cheng and V.D. Agrawal, AT&T Bell Labs.,
Murray Hill, NJ
3:20
Accurate Modeling and Simulation of Bridging Faults
17.4
ü.M.
Acken, Intel Corp.,
Santaclara,
CA; and
S.D.
Millman, Motorola, Inc.,
Tempe,
AZ
3:45
Application of Boundary-Scan and Full-Chip BIST to a
3
ASIC Chip Set
17.5
K.D. Fitch and J. Kane, AT&TBell Labs., Allentown, PA
4:10
Current Bias Testing of Differential Circuits
17.6
P. Phillips, K.
Patel,
J.
Monzel,
W.
Reohr,
С.
Beh
and
C. Radke,
IBM
General Technology Div.,
Hopewell Junction,
NY
4:35
LATE NEWS PAPER
17.7
On Applying Circular Self-Test Path (CSTP) Technique to Circuits
С
A. Njinda, R. Srinivasan and M. A.
Breuer,
Univ. of Southern California, Los Angeles, CA
SESSION
18
TUESDAY AFTERNOON
_______________________
California
_____________________________
PAPER
#
2:00
FABRICATION TECHNOLOGY
Chairman: R. Kumar
Co-Chairman: D. Wayne
2:05
A Bonded-SOI-Wafer CMOS
16
BitSOKSPS
Delta-Sigma
ADC
18.1
T. Takaramoto,
S S.
Harajiri,
О.
Kobayashi and K. Gotoh, Fujitsu Ltd.
,
Kawasaki, Japan; and M. Sawada, Fujitsu
VLSI Ltd., Nagoya, Japan
2:30
A Novel Three Dimensional BiCMOS Process Using Epitaxial Lateral Overgrowth of Silicon
18.2
R. Bashir, S. Venkatesan and
G.W. Neudeck,
Purdue University, W. Lafayette, IN
CONTENTS
2:55
A 3.3V,
0.5
μ
m BiCMOS Technology for BiNMOS and ECL
Gate 18.3
H. Miyakawa, M. Norishima, Y. Niitsu, H. Momose and K. Maeguchi, Toshiba Corp., Kawasaki,
Japan
3:20
Submicron
С
BiCMOS Technology
with New Well and Buried Layer Formed by Multiple Energy
18.4
Ion Implementation
K. Higashitani, T. Kuroi, K.
Suda,
M. Hatanaka, S.
Nagao and
N.
Tsubouchi, Mitsubishi Electric Corp.,
Itami,
Japan
3:45
Field-Plated High Gain Lateral Bipolar Transistor in Standard CMOS Process for BiNMOS
18.5
Application
K.K.
Au,
K.K. Diogu, P.G.Y. Tsui, M.L. Kosty, CM.
Palmerand Y.S.
Kim, Motorola, Inc., Austin,
TX
4:10
A Modular Memory and Process Verification Vehicle for a Sub-Micron BiCMOS Telecom
18.6
Technology
K.J. Schultz,
G.F.R. Gibson, A.L. Silburt, R.G. Gibbinsand
N.
Menta,
Bell-Northern Research Ltd., Ottawa,
Ganada;
and R.S. Phillips, Bayview Technologies, Inc., Constance Bay, Canada
4:35
A Modular Flash
EEPROM
Technology for
0.8
μ
m
High Speed Logic Circuits
18.7
K-M. Chang, S. Cheng and
С
Kuo, Motorola, Inc., Austin,
TX
5:00
Performance and Technology Trade-Off
s
of BiCMOS Submicron Processes for ASIC
18.8
Applications
L. Gal,
С
Prunty and R. Kumar, Unisys Corp., San Diego, CA
SESSION
19
TUESDAY EVENING Friars/Padre/Sierra
8:00
EVENING PANEL
MANAGING ASIC PROFITABILITY IN THE 1990 s
Moderator: R. Kumar, Unisys Corporation
SESSION
20
TUESDAY EVENING Golden West
8:00
EVENING PANEL
2001—
A SYNTHESIS ODYSSEY
Moderator: J. Lipman, VLSI Technology, Inc.
SESSION
21
TUESDAY EVENING California
3:00
EVENING PANEL
MIXED SIGNAL TEST DEVELOPMENT: THE FINAL FRONTIER?
Moderator: H.L. Scalf
,
Gould AMI Semiconductors
CONTENTS
SESSION
22
WEDNESDAY MORNING
_______________________
Presidio
______________________________
PAPER
#
8:30
COMPILER AND LIBRARY METHODOLOGY
Chairman: S.Mori
Co-Chairman: J. Buurma
8:35
ACAP
—
A System for the Interactive Graphical Capture of Module Generators
22.1
R.A. Eesley and M.A. Tarsi, Mentor Graphics Corp., Warren, NJ
9:00
Device Sizing for Silicon Compilers Using CSL
22.2
L.T. Walczowski, M.H. Smith, W.A.J.
Wallerand
D.
Howard, Univ. of Kent, Canterbury, U.K.
9:25
A Sub-Micron CMOS Embedded SRAM Compiler
22.3
J. Tou
and P. Gee, Motorola, Inc., Chandler, AZ; and J.
Duh
and R. Eesley, Mentor Graphics Corp., Warren, NJ
9:50
A Dual-Port SRAM Compiler for
0.8
Microni 00K
BiCMOS Gate Arrays
22.4
T.
Dao
and F.
Švejda,
Texas Instruments Inc., Dallas,
TX
10:15
A Procedural DATAPATH Compiler for VLSI Full Custom Applications
22.5
M. Taliercio and G. Foletto, SGSThomson Microelectronics,
Agrate
Brianza, Italy; and L. Licciardi,
CSELT,
Torino,
Italy
10:40
Automated Generation of Custom Pad Cells for ASICs
22.6
M. Braiman and J. Kuppinger, NCR Microelectronics, Fort Collins, CO
11:05
Exploiting 0.8-Micron ASIC Libraries from Different Vendors
22.7
A. Kurosawa, VLSI Technology, Inc., San Jose, CA; and S.Shimada, Hitachi Ltd., Tokyo, Japan
SESSION
23
WEDNESDAY MORNING
___________________
Friars/Padre/Sierra
_________________________
PAPER
#
8:30
DEVICE AND PROCESS MODELING AND SIMULATION
Chairman: P. Zeitzoff
Co-Chairman: R.
Milano
8:35
INVITED TUTORIAL
23.1
The Use of TCAD in Semiconductor Technology Development
E. Buturla, IBM Corp., Essex Junction, VT
9:25
An Accurate
MOS
Transistor Model for
Submicron
VLSI Circuits—BSIM_plus
23.2
S.M. Gowda and B.J. Sheu, Univ. of Southern California, Los Angeles, CA: and J.S. Cable, TRW, Inc.,
Redondo
Beach,
CA
9
:50 A New Large Signal Model for Heteroju nction Bipolar Transistors Including Temperature Effects
23.3
P.
Baureis,
W.
McKinley
and
D.
Seitzer, Fraunhof er-lnst. for Integrated Circuits,
Erlangen,
Germany
10:15
Device-Level Analysis of a
1
μ
m
BiCMOS Inverter Circuit Operating at 77K Using a Modified
23.4
PISCES Program
J.B. Kuo, Y.W. Chen and K.H. Lou, National Taiwan University, Taipei, Taiwan
10:40
High-Frequency Characterization and Modeling of Polysilicon and Diffusion Lines
23.5
W.R.
Eisenstadt
and O. Bell, University of Florida, Gainesville, FL
11:05
A Tool Towards Integration of
1С
Process, Device, and Circuit Simulation
23.6
G. Chin, Z. Yu and R.W. Dutton, Stanford University, Stanford, CA
11:30
LATE NEWS PAPER
23.7
A Pragmatic Approach to Integrated Process/Device/Circuit Simulation for
ІС
Technology
Development
K.R. Green and J.G. Fossum, Univ. of Florida, Gainesville, FL
CONTENTS
SESSION
24
WEDNESDAY MORNING
_____________________
Golden West
_______________________
PAPER
#
8:30
ANALOG CIRCUIT APPLICATIONS
Chairman: D. Lynch
Co-Chairman: D.
Embree
8:35
Fully-Differential CMOS Current-Mode Circuits
24.1
R.H. Zeie and D.J. Allstot, Carnegie Mellon University, Pittsburgh, PA; and T.S.
Fiez,
Washington State University,
Pullman, WA
9:00
A14 Bit CMOS A/D Converter Based on Dynamic Current Memories
24.2
P. Deval and M.J. Declercq, Swiss Fed. Inst. of Technology, Lausanne, Switzerland; and J. Robert, TESTA,
S.A.,
Renens,
Switzerland
9:25
A Transistor-Only Current Mode
Σ Δ
Modulator
24.3
S. J.
Daubert,
AT&T Bell Labs., Murray Hill, NJ; and D. Vallancourt, Columbia
University,
New York,
N Y
9:50
A
Single-Chip Voiceband Signal
Processor for Integrated Facsimile and Data
Modems 24.4
D.J.
Chen,
W.
Ngai, S.
Taylor,
D.
Shum, F. In tveld,
G.
Kinoshitaand
T.
Kojima,
Sharp Digital Information Products,
Inc., Irvine,
CA;
and
M. Uratani, H. Ogawa and S. Hattori, Sharp
1С
Group, Tenri,
Japan
10:15
A 5-V
CMOS Line Controller with 16-Bit Audio Converters
24.5
L. LeToumelin, P. Carbou,
Y. Leduc
and P. Guignon, Texas Instruments, Loubet, France; and J. Oredsson and
A. Lindberg,
Ericsson Components, Stockholm, Sweden
10:40
A Fully Integrated High Performance
FM
Stereo Decoder
24.6
G.J. Manlove, J.J. Marrah and R.A. Kennedy,
Delco
Electronics Corp., Kokomo, IN
SESSION
25
WEDNESDAY MORNING
________________________
California
________________________________
PAPER
#
8:30
HIGH-PERFORMANCE CIRCUITS AND CELL LIBRARY DEVELOPMENT
Chairman: M. Mittal
Co-Chairman: R. Bryant
8:35
Dynamic Asynchronous Logic for High Speed CMOS Systems
25.1
A. McAuley, Bellcore, Morristown, NJ
9:00
Current-Mode Logic Techniques for CMOS Mixed-Mode ASIC s
25.2
D.J. Alistot, Carnegie Mellon University, Pittsburgh, PA; G. Liang,
Exar
Corp., San Jose, CA; and H.C. Yang,
National Semiconductor Inc., Santa Clara, CA
9:25
A 700-MHz 24-Bit Pipelined Accumuiatorin
1.2
urn CMOS for Application
asa
Numerically
25 3
Controlled Oscillator
F. Lu
and H.
Samueli,
Univ. of California, Los Angeles, CA; and J Yuan and
C. Svensson, Linköping Univ
,
Linköping,
Sweden
9:50
A Knowledge Based Project Plan Generation and Control System for ASIC Design Management
25.4
K.D.
Müller-Glaser,
К.
Neusinger
and
К.
Kirsch, Univ.
of Erlangen-Nurnberg, Erlangen-Tennenlohe, Germany
10:15 Technology-and
Power-Supply-Independent Cell
Library 25.5
J.M.
Masgonty,
С.
Arm
and C.
Piguet, CSEM, Neuchatel, Switzerland
10:40
An Integrated Design and Characterization Environment for the Development of a Standard Cell
25 6
Library
J.C. Herbert, Mentor Graphics Corp., Warren, NJ
11:05
LATE NEWS PAPER 257
Characterizing a VLSI
Standard
Cell Library
M.A. Cirit, Adaptec Inc., Milpitas, CA
CONTENTS
SESSION
26
WEDNESDAY AFTERNOON
____________________
Presidio
______________________________
PAPER
#
1
:30 DATA CONVERSION CIRCUITS
Chairman: D.
Allstot
Co-Chairman: I. Scott
1:35
A
1
2-Bit Video BiCMOS Track-and-Hold Amplifier Using Analog Calibration
26.1
M. Nayebi, R.
Schmitt,
С.
Yeeand
N.
Bhandari, Vanguard Semiconductor, Milpitas, CA; and S. Yu andT. Batra,
California Micro Devices,
Tempe,
AZ
2:00
A Rail-to-Rail Video-Band Full Nyquist 8-Bit A/D Converter
26.2
N.
Shiwaku, Y. Tung, T. Hiroshima, K-S. Tan, T. Kurosawa, K. McDonald and M. Chiang, Texas Instruments, Inc.,
Dallas,
TX
2:25
A CMOS 20MHz 8Bit 50mW ADC for Mixed Analog/Digital ASICs
26.3
K. Tsuji and H. Sugiyama, Toshiba Corp., Kawasaki, Japan; and
N.
Sugawa, Toshiba Microelectronics, Corp.,
Japan
2
:50 A Pipelined 9-Stage Video-Rate Ana log-to-Digital Converter
26.4
S.H. Lewis, H.S. Fetterman, G.F. Gross, Jr., R. Ramachandran andT.R. Viswanathan, AT&T Bell Labs., Reading,
3:15
A
1
0bit 80MHz Glitchless CMOS
D/A
Converter
26.5
H.
Takakura,
M. Yokoyama
and A. Yamaguchi, Toshiba Corp., Kawasaki, Japan
3:40
A
10
Bit
75
Mega-Sample per Second A/D Converter
26.6
J. Marsh, K. Lofstrom, J. Engert and B. Price, Tektronix, Inc., Beaverton, OR
4:05
LATE NEWS PAPER
26.7
A CMOS
9
bit
25
MHz
1
00m
W
ADC for Mixed Analog/Digital LSIs
M. Kasahara, K. Yahagi, H. Sonoda, S. Uedaand T. Matsuura, Hitachi, Ltd., Gunma, Japan
SESSION
27
WEDNESDAY AFTERNOON
________________
Friars/Padre/Sierra
_________________________
PAPER
#
1:30
PACKAGING AND INTERFACES
Chairman: W. Vincent
Co-Chairman: J.
Tandon
1:35
INVITED
27.1
Factors in Implementing
MCM
Solutions for the High Performance Systems of the
1990s
M.L. Buschbom, Texas Instruments, Dallas,
TX;
and S.E. Calvin, Sequent Computers, Beaverton, OR
2:00
A New On-Chip
ESD
Protection Circuit with Dual Parasitic SCR Structures for CMOS VLSI
27.2
C-Y. Wu and M-D.
Ker,
Nati.
Chiao-Tung Univ., Hsin-Chu, Taiwan; C-Y. Lee, J.
Ko
and L. Lin, United
Microelectronics Corp., Hsin-Chu, Taiwan
2:25
The Design of a Monolithic, Signal Conditioned Pressure Sensor
27.3
I. Baskett, R. Frank and E.
Ramsland,
Motorola, Inc., Phoenix, AZ
2:50
A Photodetector Array for a One Terabyte
Optica
I Tape Recorder
27.4
P. Self and R. Miller, Avasem Corp., San Jose, CA; K. Brehmer,
Exar
Corp., San Jose, CA; and R.
Bielak,
CREO
Products, Inc., Burnaby, Canada
3:15 1.2
Gb/s Integrated Laser Driver with Temperature Compensation for Modulation Current
27.5
K.R. Shastri and R.F. Benjamin, AT&T Bell Labs., Allentown, PA; J.J.
Royer
and K.A. Yanushefski, AT&T Solid
State Tech. Center, Breinigsville, PA
CONTENTS
3:40
LATE NEWS
PAPER 27.6
A 60V-1
0
A Intelligent Power Switch Using Standard Cells
S.L. Wong, S. Venkitasubrahmanian, M.J. Kim and J.C. Young, Philips Labs., Briarcliff Manor, NY
3:55
LATE NEWS PAPER
27.7
VLSI Silicon-Based Prosthesis for In-Vitro Measurement of Neural Activity
K.J.
Rambo, R.M. Fox, W.R.
Eisenstadt, D.S. Langford
and
J.
Principe, Univ. of Florida, Gainesville, FL; and
R. Palovcik, Epilepsy
Research
Foundation of Florida
SESSION
28
WEDNESDAY AFTERNOON
__________________
Golden West
____________________________
PAPER
#
1
:30 PLACEMENT AND ROUTING
Chairman: T. Yanagawa
Co-Chairman: J. Lipman
1
:35 Timing Driven Routing and Resistivity Minimization
28.1
R. Hojati, Cadence Design Systems, Inc., Santa Clara, CA
2:00
An Efficient Eigenvector-Node Interchange Approach for Finding Netlist Partitions
28.2
A. Vannelli,
S.W.
Hadley and B.L. Mark, Univ. of Waterloo, Waterloo, Canada
2:25
Cell-Shifting Compaction of Building-Cell Methodology for High-Speed GaAs Standard-Cell
28.3
LSIs
T. Sasaki, K. Kawakyu, T. Seshita, A. Kameyama, T. Terada, Y.
Kitaura,
K. Ishida
and
N.
Uchitomi, Toshiba Corp.,
Kawasaki, Japan
2
:50 Hybrid Routing on Multichip Modules
28.4
C
-С.
Tsai, S-J. Chen and W-S. Feng, National Taiwan Univ., Taipei, Taiwan; and P. Y. Hsiao, National Chiao Tung
University, Hsinchu, Taiwan
SESSION
29
WEDNESDAY AFTERNOON
___________________
California
_____________________________
PAPER
#
1
:30 QUALITY AND RELIABILITY
Chairman: S. Quigley
Co-Chairman: S. Runner
1:35
INVITED
29.1
A Six Sigma Program implementation
P.A.
Tobias, IBM Corp., Hopewell Junction, NY
2:00
Analog Statistical Simulation
29.2
M. Rencher, Motorola, Inc.,
Tempe,
AZ
2:25
Hierarchical Simulation of Hot-Carrier Induced Damages in VLSI Circuits
29.3
Y. Lebtebici,
P.C.
Li, S.M. Kang and I.N. Hajj, University of Illinois,
Urbana,
IL
2:50
MetastabiJity of CMOS Master/Slave Flip-Flops
29.4
T.J.
Gabara,
AT&T Bell Labs., Allentown, PA; and G.J. Cyr and C.E. Stroud, AT&T Bell Labs., Naperville,
IL
LIST OF CONTRIBUTORS
Abidi, A.A
.....................9.4
Abraham, J.A
................. 17.2
AckenJ.M
...................17.4
Agrawal, V.D
................. 17.3
Allstot, DJ............. 24.1, 25.2
Amano,
H
..................... 3.3
An, Q.D
...................... 10.1
Änami,
К.....................
10.4
Anderson,
S
..................12.1
Ando,
H
............... 15.3, 16.4
Arai,
Y
.......................10.5
Arimoto,
К...................
10.7
Arm, C
.......................25.5
Asakura,
M
................... 10.7
Au, K.K.
..................... 18.5
Baggini,
В
..................... 7.6
Baltus, P
......................6.3
Balivada,
А
....................8.4
Ваго,
J
........................ 7.7
Bashir, R
..................... 18.2
Basken, 1....................27.3
Batra,
T
......................26.1
Baureis,
P
....................23.3
Beh,
С
....................... 17.6
Bell, 0
.......................23.5
Bencivenga, R
................ 17.1
Benjamin,
R.F
................27.5
Benz,
С
....................... 7.1
Bhandari,
N
..................26.1
Bhawmik,
S
.................. 17.3
Bielak, R
.....................27.4
Birman, M
...................16.5
Bischoff,
G
....................8.5
Blanz, W.E
....................6.5
Bolton,
M
.................... 12.2
Boudon, G
...................14.5
Boulton,
R
................... 12.2
Braiman, M
..................22.6
Bredthauer,
R
................12.6
Brehmer, K
..................27.4
Breuer, M.A..................17.7
Brown,
G.W
................. 12.7
Bruce,
W.H
.................. 12.1
Burch,
R......................
4.4
Buschbom, M.L
..............27.1
Buset, 0
......................5.6
Busschaert, H.J
................ 7.8
Buturla, E
....................23.1
Cable, J.S
....................23.2
Calazans,
N..................11.3
Calvin, S.E
...................27.1
Carbou, P
....................24.5
Carter, W.E
................... 3.5
Cha, H........................
4.4
Chai, P
....................... 15.1
Chakraborty, TJ
..............17.1
Chang,
C-F
................... 16.1
Chang,
K-M..................
18.7
Chen,
DJ................5.5, 24.4
Chen,
G
...................... 7.4
Chen, M.J
.....................4.5
Chen, S-J
.....................28.4
Chen,
Y.W
...................23.4
Cheng, K.T.
..................17.3
Cheng,
S
.....................18.7
Cheung, P.Y.K.
................8.7
Chiang,
M
....................26.2
Chien,
С......................
7.4
Chin,
G
......................23.6
Chiou,
J
......................16.5
Chiu,
E.H
....................10.1
Chiussi,
F.M
................... 3.3
Choi.J
.......................16.1
Chong,
J.W
..................
U.2
Chou,
TX
....................16.2
Choudhury, U
.................8.6
Chow,
P
......................6.1
Chu, G
.......................16.5
Chuk,T
......................15.1
Chung, B-Y
................... 7.4
Chung,
К.
....................6.1
Cirit, M.A
....................25.7
Cohen,
E......................
7.4
Cook, W.A
................... 12.7
Coppero,
L
....................7.6
Сох,
C.E......................6.5
Cullet, R
.....................14.5
Cyr, GJ......................29.4
Daneshrad,
В
..................7.2
Dao,
T
.......................22.4
Danois, L
.....................7.8
Daubert,
SJ
..................24.3
Davidson,
S
.................. 17.1
Declercq, M.J......5.6, 14,2, 24.2
Denyer, P.B.................. 12.1
Desperben,
L
..................7.8
Deval,
P
.....................24.2
DeVeirman, G.A...............9.5
Deyhimy,
1
................... 14.7
Diogu, K.K.
.................. 18.5
D Luna, LJ................... 12.7
Doi,
T.......................
15.6
Donckels,
В..................
14.7
Donnay,
S
.....................5.3
Duchene, P.P
................14.2
Duh,J
.......................22.3
Dutton, R.W
.................23.6
Eesley, R.A
............. 22.1, 22.3
Eisenstadt, W.R........ 23.5, 27.7
El Gamal, A
...................6.2
Elmasry, M.1
................. 11.6
Endo, K.
..................... 10.5
Engerí,
J.....................
26.6
Evans,
К,....................
16.5
Fandrianto,
J.................
12.3
Fang,
S
-С
......................8.1
Fang,
W
-С
............. 12.5, 16.1
Feng, W-S
....................28.4
Fetterman, H.S
...............26.4
Fiez, T.S
.....................24.1
Fitch, K.D
.................... 17.5
Foletto,
G
....................22.5
Fong,
Y.H
.................... 15.1
Fossum, E.R
.................. 12.6
Fossum, J.G
..................23-7
Fox, R.M
.....................27.7
Frank,
R
.....................27.3
Frenzel, J.F
................... 133
Fritzemeier, R.R.............. 13.1
Fujishima, K.
................ 10.7
Fujita,
M
..................... 11.5
Gabara,
TJ
...................29.4
Gal, L
........................ 18.8
Gazzoli,
G
....................7.6
Gebotys,
CH
................. 11.6
Gee, P.
......................22.3
Gibbins, R.G
.................18.6
Gibson, G.F.R
................18.6
Gielen, G
..................... 5.1
Goi,
Y
.......................15.2
Gomez,
R
.....................9.4
Goodin,
К
...................16.5
Gotoh,
К.
.................... 18.1
Gould,
E
.....................14.1
Gowan,
M
.................... 7.1
Gowda, S.M
..............4.2, 23.2
Gray,
CA....................
11.1
Green,
.(LR
...................23.7
Grewal,
H
....................16.5
Grey, A
......................14.7
Gross, G.F., Jr
................26.4
Guidash, R.M
.................12.7
Guignon,
P
...................24.5
Hadley, S.W
..................28.2
Hajj, I.N
.................4.4, 29.3
Hamamoto,
T
................10.3
Hanawa,
M
...................15.8
Hara,
H......................
14.3
Harajiri,
S
....................18.1
Hase,
К.
...................... 9.6
Hatakeyama, S
.................3-6
Hatanaka, M
............ 10.4, 18.4
Hattori, S
....................24.4
Hawkins,
CF.................
13.1
Hayashi,
T
............. 15.4, 15.6
Hayashida, H
.................10.2
Heideman,
J...................
7.3
Herbert,
J.C..................
25.6
Hibi,
T........................
6.4
Hidaka, H
....................10.7
Higashisaka,
N...............14.6
Higashitani, K.
...............18.4
Hiraki, M
....................15.8
Hiramatsu, M
................15.6
Hitano,
A
.....................9.6
Hiroshima,
T
.................26.2
Hoefflinger, F
................16.7
Hojati, R
.....................28.1
Holberg, D.R..................8.4
Honda, H
....................10.4
Horită,
R......................
9.6
Howard,
D...................
22.2
Hsiao, R.Y
....................28.4
Hsu,
W-J
......................4.2
Hu, C
.........................4.1
Hu,
L
........................ 15.1
Huang, C.Y
....................4.5
Hwang, C-G
...................4.2
Ichida,
M
.....................8.8
Iimura,
R
.....................4.4
Ikenaga,
С
................... 15.3
In tveld, F.
...................24.4
Isnibashi,
M
.................. 14.4
Ishida, K.
....................28.3
Ishigaki,
Y
...................10.4
Ishimoto,
S
................... 14.4
Ishiyama, A
............ 15.4, 15.6
Isogai,
T
......................36
Ito,
Y
........................ 10.2
Jacobi,
R
..................... 11.3
Jain, R.
.......................7.4
jarwala,
M
................... 13.5
Jennings,
G
...................8.2
Joshi, R.B
.....................7.2
Kadota,
H
....................15.2
Kameyama, A
................28.3
Kane,
J
....................... 17.5
Rang, S.M
....................29.3
Kanno,
T
...................... 3.4
Kasahara,
M
..................26.7
Kawakyu,
К
..................28.3
Kawamata, A
.................15.8
Kayano,
S
.................... 14.6
Kemény,
S.E................. 12.6
Kennedy, R.A
................24.6
Ker,
M-D
.....................27.2
Ют,
MJ
.....................27.6
Ют,
Y.S
..................... 18.5
Kimura, N
....................8.3
Kinoshita,
G
.................24.4
Kirsch,
К.
...................25.4
Kishida,
T
....................15.2
Kitaura,
Y
....................28.3
Ko, J
.........................27.2
Kobayashi,
D
.................18.1
Kobayashi,
S
.................14.3
Kobayashi,
T
........... 10.3, 14.4
Koide,
К.
.............. 15.4, 15.6
Kojima,
S
..................... 9.6
Kojima,
T
....................24.4
Konishi,
С
.................... 3.6
Koskinen, T
...................8.7
Kosty, M.L
................... 18.5
Kouloheris, J.L
................6.2
Kruse,
D
...................... 7.2
Kukimoto, Y
.................11.5
Kumar,
R
....................18.8
Kuo, C
.......................18.7
Kuo, J.B
................ 16.2, 23.4
Kuppinger, J
.................22.6
Kurahara, A
..................14.4
Kuroi, T
.....................18.4
Kurosawa, A
.................22.7
Kurosawa,
T
.................26.2
Kwan, T
......................9.3
Langford, D.S
.................27.7
LaShell, M
....................12.6
Lau,
L
........................ 7.4
Leblebici, Y
..................29.3
Leduc, Y
.....................24.5
Lee, C-Y
.....................27.2
Lee, G
.......................14.7
Lee, W.C
.....................16.2
LeToumelin, L
...............24.5
Levitt,
M.E...................17.2
Lewis,
D
......................6.1
Lewis, S.H....................26.4
Li, P.C
.......................29.3
Liang,
G
.....................25.2
Licciardi,
L
...................22.5
Ligthart,
M
....................6.3
Lin, C.J
......................17.3
Un,
L
........................27.2
Lin, Z-M
......................5.4
Lindberg,
A
..................24.5
Lippens, P.E.R
................11.7
Lofetrom, K.
.................26.6
Lou, K.H
.....................23.4
Lu. F.
........................25.3
Machida, H
..................15.3
Maeda, A
..................... 15.3
Maeguchi, K.
................ 18.3
Maloberti, F.
.................. 7.6
Mały, W
............... 13-4, 15.5
Manlove, GJ
.................24.6
Mansharamani,
D
.............16.5
Marinos,
P.N.................
13.3
Mark, B.L
....................28.2
Marran,
JJ
...................24.6
Marsh,
J
......................26.6
Martin,
В
....................12.3
Martin,
J
.....................12.2
Martin, K.
.................... 9.3
Martinella,
J..................
16.5
Masgonty,
J.M................
25.5
Matsubishi,
N................ 16.4
Matsumura, T.
...............10.5
Matsuoka,
H
................. 14.6
Matsuura,
T
..................26.7
Mauchauffee,
D
.............. 14.5
McAuley, A
..................25.1
McDonald, K.
................26.2
McDonald, M.A
...............3.1
McKinley,
W.................
23.3
McŁeod.J
.................... 16.5
McSweeney,
В.Т
.............11.7
Meadows,
H
................. 12.6
Mehta,
N.....................18.6
Metviiie, R.C
..................8.1
Minara,
M
.................... 10.3
Miller,
R.....................
27.4
Millman, S.D
.................17.4
Misra, S
...................... 11.4
Mitra,
В
......................11.4
Miyakawa, H
................. 18.3
Miyazawa, S
...................9.6
Mizukami, M
.................. 3.4
Mizutani, H
..................16.4
Momose, H
..................18.3
MonzelJ
....................17.6
Monta, S
..................... 15.8
Mouthaan,
T
.................. 5.2
Müller-Glaser,
K.Đ
...........25.4
Murata,
H
.....................6.4
Muroga, H
....................6.4
Myers,
DJ...................16.3
Nagamatsu,
T
................14.3
Nagao,
S
............... 10.4, 18.4
Nakai,Y
.....................15.2
Nakajima, M
.................15.2
Nakakura, Y.
................. 15.2
Nakano,
H
............. 10.6,15.2
Nakano,
У.....................
3.4
Nakashima, H
................ 15.3
Nakaya, M
...................15.3
Nïyebi, M
....................26.1
Neudeck, G.W...............18.2
Neusinger,
К.
................25.4
Newton, A.R. ................. 8.8
NftK........................ 15.1
Ng,S........................ 12.2
Ngai,
W
......................24.4
Nicholas,
H.T. ................7.2
Nätsu,Y. .................... 18.3
Ning, Z-Q
..................... 5.2
Nishida,T.................... 15.8
Nishìmu»,
T
.............6.4, 14.6
Nixon, R..................... 12.5
Njinđa.CA
.................. 17.7
Nexła,M
............... 14.3, 14.6
Noguchi,
T
.................... 6.4
Norishfena,
M
..........
Ю.2,
18.3
СУШ*»,!*
...................11.1
Ogiw«, H
....................24.4
Ohashi, Y.
.................... 6.4
Шм,
A.
..................... 10.4
OMxtyashi, S
................. 10.4
Ohki,
N...................... 15.8
Ohta, M
...................... 10.6
Ohuchi,
К
................... 10.6
Ooishi,
T
.................... 10.7
Oowaki, Y
...................10.6
Op t Eynde, F
.................9.1
Oredsson,
J
..................24.5
Orrey, D.A
................... 16.3
Pal Choudhuri,
P
............. 11.4
Palmer,
C.M
.................. 18.5
Palmisano,
G
..................7.6
Palovcik,
R
...................27.7
Patel,
К.
..................... 17.6
Patyra, M
.............. 13.4, 15.5
Phillips,
P
.................... 17.6
Phillips, R.S
.................. 18.6
Piguet,
С.....................
25.5
Pillage, L.T
.................... 8.4
Plassat,
D
.................... 14.5
Pon,
A
.......................16.6
Prabhu,J
..................... 15.1
Price,
В
......................26.6
Primatic, A
...................15.5
Principe, J
...................27.7
Prunty, C
....................18.8
Quek, A
...................... 15.1
Quenot, G.M
.................12.4
Radke, C
.....................17.6
Rahgavan, V
..................15.5
Rahali, F
...................... 5.6
Rainnie, H
...................12.3
Ramachandran, R
.............26.4
Rambo, K.J
...................27.7
Ramsland,
E
..................27.3
Rao,
V.B......................
4.4
Razdan, R
.....................8.5
Rencher, M
..................29.2
Renshaw, D
..................12.1
Reohr,
W
....................17.6
Reusens, P.P
.................. 7.8
Robe,
TJ
...................... 3.2
Robert,
J
.....................24.2
Rose, J
........................ 6.1
Rowson, J
....................11.1
Roy, K.
......................17.2
Royer, J.J....................27.5
Saeki, Y.
...................... 6.4
Sakurai, T
................8.8, 14.3
Saleh, R.A.....................4.3
Samueli,
H
.......... 7.2, 7.4, 25.3
Samuels, A
............ 15.1,16.5
Sangiovanni-Vincentelli, A
.....8.6
Sano,
F.
...................... 14.3
Sansen,
W.............
5.1, 5.3, 9.1
Sasaki,
N
.....................14.6
Sasaki,
T.
....................28.3
Satoh,Y
....................... 3.4
Satou, Y.
.....................15.4
Sawada, K.
...................10.2
Sawada,M
...................18.1
Schmitt,
R...................
26.1
Schnaitter, W.N
..............16.6
Schultz,
KJ..................
18.6
Segawa.R.
...................15.2
Sei,
T.
.......................14.4
Setaer,
D
....................23.3
ЅеИ,
К.
......................15.8
Sdf,P.
.......................27.4
Selzer, M
.....................16.7
Seshita,
T
....................28.3
Seta, K.
......................14.3
Sevenhans,
J
..................7.7
Sforzini,
L
..................... 7.6
Shafir, H
...................... 7.3
Shastri, K.R..............3.5, 27.5
Sheu, B.J................. 4.2, 5.5,
12.5, 16.1, 23.2
Shih, C-C..................... 7.3
Shih, F-H.W..................15.7
Shimada,
M
..................14.6
Shimada,
S
...................22.7
Shin,
H......................
11.2
Shinagawa,
S
..................3.4
Shiomi,
T
....................10.4
Shiwaku,
N
...................26.2
Snoval,
A
......................9.2
Shukuri,
S
....................15.8
Shum,
D
.....................24.4
Silburt,
AX
...................18.6
Singh,
S
.......................6.1
Smith,
M.H
...................22.2
Smith, M.J.S
..................11.1
Snelgrove,
M..................
9.2
Soden, J.M...................13.1
SoUenberger, N.R
.............7.5
Soma,
M
.....................13.6
Sonoda,
H
....................26.7
Sonobe,
Y
..................... 3.4
Springer,
К.
...................7.1
Srinivasan,
R
.................17.7
Storey,
T
.....................15.5
Stroud,
CE
...................29.4
Suda, K.
.....................18.4
Sugawa,
N...................26.3
Sugiyama,
Η
..................26.3
Sumi,
Τ
......................10.4
Sutardja, S
...................12.3
Suzuki,
M
....................15.8
Švejda,
F.....................22.4
Svensson, C
..................25.3
Swings,
К.
.................... 5.3
Takahashi,
К.
.................3.6
Takahashi,
M
................. 10.2
Takakura,
H
..................26.5
Takaramoto, T
...............18.1
Takashima,
D
................10.6
Takayangi, T
................. 10.2
Taliercio,
M
..................22.5
Tan, K-S
.....................26.2
Tan, L.K.
.....................7.2
Tanaka,
H
.................... 11.5
Tanaka.Y.
................... 14.4
Tarsi,
M.A
....................22.1
Taylor,
S.
....................24.4
Terada, T
....................28.3
Tobagi, FA
....................
З.З
Tobias,
РЛ
...................29.1
Tokuno, Y.
..................16.4
Torby,
H.....................
12.6
Tou, J
........................22.3
Toyosnima, Y.
...............10.2
Trajkovic, LJ
..................8.1
Trauet,
R.
...................14.5
Trullemans, C
................
1
1.3
Tsai, C-C
.....................28.4
Tsai, N.S
......................4.5
Tsai, S-J
...................... 13.5
Tseng, P.N
....................4.5
Tsubouchi, N
................18.4
Tsuchida, K.
.................10.6
Tsui, P.G.Y.
..................18.5
Tsuji, K.
.....................
26.З
Tsujimoto, J
...................8.3
Tung,
Y.
.....................26.2
Turner,
S
....................12.2
Uchida,M
.............. 10.2,14.3
Üchitomi,
N
..................28.3
Ueda, S
......................26.7
Uehara, T
....................16.4
Uratani, M
...................24.4
Urmston, S.L
.................16.6
Vallancourt, D
...............24.3
van der
Meulen, P
.............6.3
van der Werf,
A
..............11.7
van Meerbergen,
J
............11.7
Vannelli, A
...................28.2
Vanthienen, J
................. 5.1
Vanwelsenaers, A
.............. 7.7
Vaucher, P
.................... 5.6
Venkatesan, S
................18.2
Venkitasubrahmanian, S
......27.6
Verhaegh, W.F.J
..............11.7
Vincent, J.A
..................12.7
Vincent, J.M
..................
I6.3
Viswanathan, T.R
.............26.4
Wada,
T
.....................10.4
Walczowski, L.T
..............22.2
Waller, W.AJ
.................22.2
Wallinga,
H
................... 5.2
Wallis,
В
.....................16.5
Walsh, K.A
.................... 3.2
Wambacq,
P..................
5.1
Wang,
C-S
.................... 12.3
Wang, G
.....................12.1
Wang,
T......................
4.6
Warkowski, F
................16.7
Watanabe,
N..................
З.6
Watanabe, S
..................10.6
Watanabe, Y.
.......... 10.6, 14.3
Waugh,
T
.....................6.6
Wenin,J
...................... 7.7
Wissel,
L.....................
14.1
Wolfe, A.
....................15.5
Wong,
B.C
....................7.2
Wong,
EJ
....................16.2
Wong,
SX
....................27.6
Wu, C.Y.
................4.5, 27.2
Wu,
D
.......................16.5
Wu, D.M
.....................13.2
Wu, SJ
........................4.6
Wurster,
S
....................7.3
Yagyu, M
..................... 3.6
Yahagi, K.
...................26.7
Yamada, M
...................10.3
Yamagata,
T
..................10.3
Yamagishi, M
........... 15.4, 15.6
Yamagiwa, A
........... 15.4, 15.6
Yamaguchi, A
................26.5
Yamasaki, R.G
.................9.5
Yang, F.L......................4.3
Yang, H.C....................25.2
YangJ.J
.....................11.2
Yang, P.T. ....................7.4
Yano,K.
..................... 15.8
Yanushefeki, K.A.............27.5
Yee,
С
.......................26.1
Yeun.J
......................15.1
Yokoyama, M
................26.5
Yoshida, T.
..................15.2
Young,
J.C...................
27.6
Yu,S
.........................26.1
Yu,
Z
........................23.6
Yuan,
J
.......................25.3
Zavidovique,
В
...............12.4
Zele, R.H
....................24.1
Zhang,
Q
....................
Ц.З
Zhu, M
......................16.5
|
| any_adam_object | 1 |
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| dewey-full | 621.3815 |
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| dewey-search | 621.3815 |
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| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Conference Proceeding Book |
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| genre_facet | Konferenzschrift 1991 San Diego Calif. |
| id | DE-604.BV005923992 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T16:36:57Z |
| institution | BVB |
| institution_GND | (DE-588)5059525-8 |
| isbn | 0780300157 0780300165 0780300173 |
| language | English |
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| physical | Getr. Zählung Ill., graph. Darst. |
| publishDate | 1991 |
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| publisher | Inst. of Electrical and Electronics Engineers |
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| spelling | Custom Integrated Circuits Conference 13 1991 San Diego, Calif. Verfasser (DE-588)5059525-8 aut Proceedings of the IEEE 1991 Custom Integrated Circuits Conference Town & Country Hotel San Diego, California, May 12 - 15, 1991 New York, NY Inst. of Electrical and Electronics Engineers 1991 Getr. Zählung Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Literaturangaben Integrated circuits Congresses Kundenspezifische Schaltung (DE-588)4122250-7 gnd rswk-swf Integrierte Schaltung (DE-588)4027242-4 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 1991 San Diego Calif. gnd-content Kundenspezifische Schaltung (DE-588)4122250-7 s DE-604 Integrierte Schaltung (DE-588)4027242-4 s 1\p DE-604 Digitalisierung TU Muenchen application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=003709647&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Proceedings of the IEEE 1991 Custom Integrated Circuits Conference Town & Country Hotel San Diego, California, May 12 - 15, 1991 Integrated circuits Congresses Kundenspezifische Schaltung (DE-588)4122250-7 gnd Integrierte Schaltung (DE-588)4027242-4 gnd |
| subject_GND | (DE-588)4122250-7 (DE-588)4027242-4 (DE-588)1071861417 |
| title | Proceedings of the IEEE 1991 Custom Integrated Circuits Conference Town & Country Hotel San Diego, California, May 12 - 15, 1991 |
| title_auth | Proceedings of the IEEE 1991 Custom Integrated Circuits Conference Town & Country Hotel San Diego, California, May 12 - 15, 1991 |
| title_exact_search | Proceedings of the IEEE 1991 Custom Integrated Circuits Conference Town & Country Hotel San Diego, California, May 12 - 15, 1991 |
| title_full | Proceedings of the IEEE 1991 Custom Integrated Circuits Conference Town & Country Hotel San Diego, California, May 12 - 15, 1991 |
| title_fullStr | Proceedings of the IEEE 1991 Custom Integrated Circuits Conference Town & Country Hotel San Diego, California, May 12 - 15, 1991 |
| title_full_unstemmed | Proceedings of the IEEE 1991 Custom Integrated Circuits Conference Town & Country Hotel San Diego, California, May 12 - 15, 1991 |
| title_short | Proceedings of the IEEE 1991 Custom Integrated Circuits Conference |
| title_sort | proceedings of the ieee 1991 custom integrated circuits conference town country hotel san diego california may 12 15 1991 |
| title_sub | Town & Country Hotel San Diego, California, May 12 - 15, 1991 |
| topic | Integrated circuits Congresses Kundenspezifische Schaltung (DE-588)4122250-7 gnd Integrierte Schaltung (DE-588)4027242-4 gnd |
| topic_facet | Integrated circuits Congresses Kundenspezifische Schaltung Integrierte Schaltung Konferenzschrift 1991 San Diego Calif. |
| url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=003709647&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
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