Sequential logic synthesis:
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Buch |
| Sprache: | Undetermined |
| Veröffentlicht: |
Boston u.a.
Kluwer Acad.
1992
|
| Schriftenreihe: | The Kluwer international series in engineering and computer science
162 |
| Schlagworte: | |
| Beschreibung: | Literaturverz. S. 209 - 219 |
| Beschreibung: | XV, 225 S. graph. Darst. |
| ISBN: | 079239187X |
Internformat
MARC
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| 084 | |a DAT 550f |2 stub | ||
| 084 | |a ELT 459f |2 stub | ||
| 100 | 1 | |a Ashar, Pranav |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Sequential logic synthesis |c by Pranav Ashar ; Srinivas Devadas ; A. Richard Newton |
| 264 | 1 | |a Boston u.a. |b Kluwer Acad. |c 1992 | |
| 300 | |a XV, 225 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 1 | |a The Kluwer international series in engineering and computer science |v 162 | |
| 500 | |a Literaturverz. S. 209 - 219 | ||
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| 650 | 0 | 7 | |a CAD |0 (DE-588)4069794-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Automatentheorie |0 (DE-588)4003953-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Datenverarbeitung |0 (DE-588)4011152-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Logischer Entwurf |0 (DE-588)4168051-0 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Automatentheorie |0 (DE-588)4003953-5 |D s |
| 689 | 0 | |5 DE-604 | |
| 689 | 1 | 0 | |a Schaltwerk |0 (DE-588)4052057-2 |D s |
| 689 | 1 | |5 DE-604 | |
| 689 | 2 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
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| 689 | 2 | |5 DE-604 | |
| 689 | 3 | 0 | |a Datenverarbeitung |0 (DE-588)4011152-0 |D s |
| 689 | 3 | 1 | |a Logischer Entwurf |0 (DE-588)4168051-0 |D s |
| 689 | 3 | 2 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 3 | |5 DE-604 | |
| 700 | 1 | |a Devadas, Srinivas |d 1963- |e Verfasser |0 (DE-588)121371107 |4 aut | |
| 700 | 1 | |a Newton, Arthur R. |e Verfasser |4 aut | |
| 830 | 0 | |a The Kluwer international series in engineering and computer science |v 162 |w (DE-604)BV023545171 |9 162 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-003152586 | ||
Datensatz im Suchindex
| _version_ | 1804119257735233536 |
|---|---|
| any_adam_object | |
| author | Ashar, Pranav Devadas, Srinivas 1963- Newton, Arthur R. |
| author_GND | (DE-588)121371107 |
| author_facet | Ashar, Pranav Devadas, Srinivas 1963- Newton, Arthur R. |
| author_role | aut aut aut |
| author_sort | Ashar, Pranav |
| author_variant | p a pa s d sd a r n ar arn |
| building | Verbundindex |
| bvnumber | BV005125737 |
| classification_rvk | ST 190 |
| classification_tum | DAT 550f ELT 459f |
| ctrlnum | (OCoLC)246512515 (DE-599)BVBBV005125737 |
| discipline | Informatik Elektrotechnik |
| format | Book |
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| id | DE-604.BV005125737 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T16:23:19Z |
| institution | BVB |
| isbn | 079239187X |
| language | Undetermined |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-003152586 |
| oclc_num | 246512515 |
| open_access_boolean | |
| owner | DE-91 DE-BY-TUM DE-12 DE-739 DE-29T |
| owner_facet | DE-91 DE-BY-TUM DE-12 DE-739 DE-29T |
| physical | XV, 225 S. graph. Darst. |
| publishDate | 1992 |
| publishDateSearch | 1992 |
| publishDateSort | 1992 |
| publisher | Kluwer Acad. |
| record_format | marc |
| series | The Kluwer international series in engineering and computer science |
| series2 | The Kluwer international series in engineering and computer science |
| spelling | Ashar, Pranav Verfasser aut Sequential logic synthesis by Pranav Ashar ; Srinivas Devadas ; A. Richard Newton Boston u.a. Kluwer Acad. 1992 XV, 225 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier The Kluwer international series in engineering and computer science 162 Literaturverz. S. 209 - 219 Schaltwerk (DE-588)4052057-2 gnd rswk-swf CAD (DE-588)4069794-0 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf Automatentheorie (DE-588)4003953-5 gnd rswk-swf Datenverarbeitung (DE-588)4011152-0 gnd rswk-swf Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf Automatentheorie (DE-588)4003953-5 s DE-604 Schaltwerk (DE-588)4052057-2 s VLSI (DE-588)4117388-0 s CAD (DE-588)4069794-0 s Datenverarbeitung (DE-588)4011152-0 s Logischer Entwurf (DE-588)4168051-0 s Devadas, Srinivas 1963- Verfasser (DE-588)121371107 aut Newton, Arthur R. Verfasser aut The Kluwer international series in engineering and computer science 162 (DE-604)BV023545171 162 |
| spellingShingle | Ashar, Pranav Devadas, Srinivas 1963- Newton, Arthur R. Sequential logic synthesis The Kluwer international series in engineering and computer science Schaltwerk (DE-588)4052057-2 gnd CAD (DE-588)4069794-0 gnd VLSI (DE-588)4117388-0 gnd Automatentheorie (DE-588)4003953-5 gnd Datenverarbeitung (DE-588)4011152-0 gnd Logischer Entwurf (DE-588)4168051-0 gnd |
| subject_GND | (DE-588)4052057-2 (DE-588)4069794-0 (DE-588)4117388-0 (DE-588)4003953-5 (DE-588)4011152-0 (DE-588)4168051-0 |
| title | Sequential logic synthesis |
| title_auth | Sequential logic synthesis |
| title_exact_search | Sequential logic synthesis |
| title_full | Sequential logic synthesis by Pranav Ashar ; Srinivas Devadas ; A. Richard Newton |
| title_fullStr | Sequential logic synthesis by Pranav Ashar ; Srinivas Devadas ; A. Richard Newton |
| title_full_unstemmed | Sequential logic synthesis by Pranav Ashar ; Srinivas Devadas ; A. Richard Newton |
| title_short | Sequential logic synthesis |
| title_sort | sequential logic synthesis |
| topic | Schaltwerk (DE-588)4052057-2 gnd CAD (DE-588)4069794-0 gnd VLSI (DE-588)4117388-0 gnd Automatentheorie (DE-588)4003953-5 gnd Datenverarbeitung (DE-588)4011152-0 gnd Logischer Entwurf (DE-588)4168051-0 gnd |
| topic_facet | Schaltwerk CAD VLSI Automatentheorie Datenverarbeitung Logischer Entwurf |
| volume_link | (DE-604)BV023545171 |
| work_keys_str_mv | AT asharpranav sequentiallogicsynthesis AT devadassrinivas sequentiallogicsynthesis AT newtonarthurr sequentiallogicsynthesis |